Mixed-Signal Silicon Validation Engineer

Synopsys, Inc.; Mississauga; On-site; CAD 110,000 - 160,000; Full time

Job summary

Synopsys is seeking a senior validation engineer to lead high-speed mixed-signal IP verification in a lab environment in Mississauga. You will validate SerDes, ADC, and DAC blocks using BERTs, real-time and sampling oscilloscopes, VNAs, and TDRs, and you’ll translate measurements into actionable guidance for design teams.

You will develop robust test plans, automate data analysis with MATLAB and Python, and partner with analog designers and systems engineers to drive robust, compliant silicon

Qualifications

• Master's degree in Electrical or Electronics Engineering with 6+ years of post-silicon validation experience.
• Bachelor's degree with 7+ years of equivalent experience.
• Hands-on lab expertise with BERTs, real-time and sampling oscilloscopes, VNAs, and TDRs.
• Strong knowledge of analog and mixed-signal circuit design and failure modes.
• Proficiency in MATLAB and Python for test automation and data analysis.
• Experience with PAM-4 signaling test; SerDes, ADC, or DAC validation is a plus.
• Familiarity with schematic entry tools, PCB design, signal integrity, and data mining of results.

Responsibilities

• Validate and characterize high-speed mixed-signal IP including SerDes, ADC, DAC, and related analog circuits in a lab environment using BERTs, real-time and sampling oscilloscopes, VNAs, and TDRs
• Develop test plans and methodologies that prove compliance with electrical standards and protocol specifications, not just functional operation but margin, corner case behavior, and interoperability
• Debug silicon issues by analyzing circuit behavior, correlating lab results with design intent, and working directly with analog designers and systems engineers to identify root cause and drive fixes
• Design and build test boards and hardware setups to support validation, including schematic entry, component selection, and PCB layout coordination
• Automate test sequences and data analysis using Python and MATLAB, turning raw measurements into actionable insights and clear reports for design teams and customers
• Specify and source new test equipment and components as validation requirements evolve, ensuring the lab stays equipped to handle next-generation IP
• Generate detailed test reports documenting results, methodologies, pass/fail criteria, and recommendations that engineering and customer teams can use to make decisions

Skills

MATLAB

Python

Signal integrity

High-speed validation

PAM-4 signaling

SerDes

ADC

DAC

Education

Master's degree in Electrical or Electronics Engineering

Bachelor's degree with 7+ years of experience

Tools

BERTs

Real-time oscilloscopes

Sampling oscilloscopes

VNAs

TDRs

Schematic entry tools

PCB design and layout

Job description

Synopsys is seeking a senior validation engineer to lead high-speed mixed-signal IP verification in a lab environment in Mississauga. You will validate SerDes, ADC, and DAC blocks using BERTs, real-time and sampling oscilloscopes, VNAs, and TDRs, and you’ll translate measurements into actionable guidance for design teams.

You will develop robust test plans, automate data analysis with MATLAB and Python, and partner with analog designers and systems engineers to drive robust, compliant silicon