IP Validation Design Lead - Post-Silicon & Debug

AMD; Markham; Hybrid; CAD 110,000 - 160,000; Full time

Job summary

AMD is seeking an IP Validation Design Lead in Markham to drive validation, debugging, and cross-functional collaboration for AMD’s IP across APU, CPU, Compute and graphics SOC programs. The role emphasizes leadership, mentoring, and strong problem-solving in a fast-moving environment.

The ideal candidate has deep expertise in complex processor architecture, digital design, and validation, with excellent communication and a proactive, self-starting approach to drive tasks to completion.

Qualifications

• Foundation in Systems & SoC architecture.
• Experience in digital logic design/verification/post-silicon validation.
• Experience with ASIC debugging techniques.

Responsibilities

• Drive planning, validation, and debug of hardware IP for AMD SOC programs.
• Define and report overall validation strategy for IPs.
• Collaborate with Design Verification and Diagnostics teams to ensure readiness for first silicon.

Skills

CPU or GPU architecture

Digital design/validation

Collaboration & mentoring

Strong communication

Analytical problem solving

Education

Bachelor’s or Master’s degree in EE/CS

Tools

Ruby

Python

Oscilloscopes

Job description

AMD is seeking an IP Validation Design Lead in Markham to drive validation, debugging, and cross-functional collaboration for AMD’s IP across APU, CPU, Compute and graphics SOC programs. The role emphasizes leadership, mentoring, and strong problem-solving in a fast-moving environment.

The ideal candidate has deep expertise in complex processor architecture, digital design, and validation, with excellent communication and a proactive, self-starting approach to drive tasks to completion.