IP Post-Silicon Validation Engineer

Advanced Micro Devices; Markham; On-site; CAD 80,000 - 100,000; Full time

Benefits offered by this job

Comprehensive health benefits

Career development opportunities

Inclusive workplace culture

Job summary

Advanced Micro Devices, Inc is seeking an IP Validation Design Engineer in Markham, Ontario. You will play a crucial role in developing AMD’s industry-leading technologies by driving validation and debugging of hardware IP for APU and CPU programs.

The ideal candidate should have a solid foundation in digital logic design, strong scripting skills, and the ability to work collaboratively in a dynamic environment. Benefits offered include competitive salary and a culture that nurtures professional growth.

Qualifications

• Strong analytical and problem-solving skills.
• Experience collaborating with different time zones.
• Ability to drive tasks to completion independently.

Responsibilities

• Drive planning, validation, and debugging of hardware IP.
• Define and document the functional test plan.
• Engage on pre-silicon activities with cross-functional teams.

Skills

Digital logic design

Verification

Post-silicon validation

Scripting (Ruby, Python)

Communication skills

Education

Bachelor's or master's degree in EE, CS or related field

Tools

Protocol analyzers

Oscilloscopes

Job description

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

THE ROLE

The AMD NBIO Team is on the lookout for a dynamic, upbeat IP Validation Design Engineer to join our growing team. As a key contributor to the success of AMD’s IP, you will be part of a leading team to drive and improve AMD’s abilities to deliver the highest quality, industry leading technologies to market. The NBIO Team fosters and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.

THE PERSON

You have a passion for modern, complex processor architecture, digital design, and validation in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You are a self-starter with strong analytical and problem‑solving skills and are willing to learn and ready to independently drive tasks to completion.

KEY RESPONSIBILITIES

As an IP Validation Design Engineer, you will drive the planning, validation, and debug of various hardware IP for forthcoming AMD APU, CPU, Compute and Discrete Graphics SOC programs.

• Defining, documenting, executing and reporting the overall functional test plan and validation strategy for a set of AMD IP’s.
• Driving technical innovation to enhance AMD's capabilities in IP validation, including tools and scripts/automation development, technical and procedural methodology enhancement, and various internal and cross‑functional technical initiatives.
• Debugging IP issues found during pre‑silicon, bring‑up, system validation, and production phases of the SOC programs.
• Engaging on pre‑silicon ‘shift left’ activities with cross‑functional teams such as Design Verification (DV), Diagnostics, Emulation and other software/hardware modeling frameworks to ensure readiness for first silicon arrival, enablement of IP functionality, and debug of critical features.
• Leading collaborative technical discussions to drive resolution of technical issues and roll out technical initiatives.
• Developing knowledge of system architecture/debug and other internal IP’s.
• Supporting issues on customer platforms as requested by customer support teams.

PREFERRED EXPERIENCE

• Experience in digital logic design/verification/post‑silicon validation.
• Extensive experience with ASIC debug techniques and methodologies.
• Knowledge of physical and protocol levels of common high‑speed interfaces such as PCIe/CXL/UALINK is an asset
• Experience with board/platform‑level debug, including clock/power delivery, sequencing, analysis, and optimization.
• Strong scripting skills (eg. Ruby, Python).
• Extensive experience with common lab equipment, including protocol/logic analyzers, oscilloscopes, etc.
• In‑depth knowledge of PC architectures/PCIe protocol is an asset.
• Must have excellent written and verbal communication skills.
• Must excel in a dynamic team working environment.
• Leadership and mentoring skills a definite asset.
• Must be a self‑starter and be able to independently drive tasks to completion.

ACADEMIC CREDENTIALS

• Bachelor’s or master’s degree majoring in EE, CS or related field

LOCATION

Markham

BENEFITS

Benefits offered are described: AMD benefits at a glance.

EEO STATEMENT

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AI POLICY

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

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This posting is for an existing vacancy.