FPGA Firmware Design Engineer – DDR/LPDDR IP

207 Altera Semiconductor Technology Canada ULC; Toronto; On-site; CAD 92,000 - 133,000; Full time

Job summary

Altera, a leader in FPGA solutions, seeks an engineer to join the IP solutions team in Canada. You will work on DDR5/LPDDR5 calibration firmware, integrate with Quartus Prime CAD tools, and develop robust IP cores for external memory interfaces.

The role spans architecture, verification, and customer collaboration. Candidate will engage with silicon design, pre/post-silicon validation, application engineering, and customer experience teams to ensure seamless deployment of high‑speed memory

Qualifications

• Bachelor's degree in Computer Engineering, Engineering Science, Electrical Engineering, Computer Science or related field.
• 2+ years of experience in Digital logic hardware design or verification (SystemVerilog/Verilog/VHDL).
• 2+ years of experience in scripting languages and/or software programming (Python/TCL/Perl and/or C/C++).

Responsibilities

• Architecture and design based on DDR/LPDDR specifications.
• Firmware development for memory calibration.
• Device support and CAD tool integration.
• Verification (verification IP, methodologies, frameworks, etc.).
• Hardware power-on and debug.
• New product release and rollout support.
• Customer technical support.

Skills

Digital logic hardware

SystemVerilog/Verilog/VHDL

Scripting languages (Python/TCL/Perl/C

Firmware development

Education

Bachelor's degree in Computer/ Electrical Engineering or related field

Tools

RTL simulation environments

DDR/LPDDR hardware interfaces

Embedded software for I/O calibration

Job description

Altera, a leader in FPGA solutions, seeks an engineer to join the IP solutions team in Canada. You will work on DDR5/LPDDR5 calibration firmware, integrate with Quartus Prime CAD tools, and develop robust IP cores for external memory interfaces.

The role spans architecture, verification, and customer collaboration. Candidate will engage with silicon design, pre/post-silicon validation, application engineering, and customer experience teams to ensure seamless deployment of high‑speed memory