Senior FPGA P&R Design Automation Engineer

207 Altera Semiconductor Technology Canada ULC; Toronto; On-site; CAD 84,000 - 121,000; Full time

Job summary

Altera Semiconductor Technology Canada ULC in Toronto, Ontario, is seeking a Senior Place & Route Design Automation Engineer to advance automated P&R flows for FPGA silicon development. You will collaborate with physical design, CAD, RTL, and cross-geo teams to improve QoR, timing, and scalability.

Ideal candidates have 7+ years in P&R or physical design, strong Tcl, Python, and Unix/Linux experience, and enjoy building robust end-to-end automation in a fast-paced semiconductor environment.

Qualifications

• Bachelor's degree in Electrical/Computer Engineering or related field.
• 7+ years in Place & Route or physical design in FPGA/ASIC environments.
• Strong coding in Tcl, Python; Unix/Linux experience.

Responsibilities

• Work on Place & Route tools, flows, and methodologies for FPGA silicon design.
• Develop new P&R flows and tool enhancements for next-gen design.
• Maintain and improve existing automation flows and infrastructure.
• Provide end-user support for flow tools and best practices.

Skills

Tcl scripting

Python scripting

Unix/Linux

Automation design

Flow debugging

Education

Bachelor's degree in EE/CE/CS

Tools

Synopsys P&R

Cadence P&R

Job description

Altera Semiconductor Technology Canada ULC in Toronto, Ontario, is seeking a Senior Place & Route Design Automation Engineer to advance automated P&R flows for FPGA silicon development. You will collaborate with physical design, CAD, RTL, and cross-geo teams to improve QoR, timing, and scalability.

Ideal candidates have 7+ years in P&R or physical design, strong Tcl, Python, and Unix/Linux experience, and enjoy building robust end-to-end automation in a fast-paced semiconductor environment.