Cross-Functional Engineer, Principal

Qualcomm; Vancouver; On-site; CAD 140,000 - 200,000; Full time

Job summary

Qualcomm Canada ULC is seeking a senior engineer for Analog/Mixed-Signal design in Vancouver. You will contribute to Gen7/Gen8 analog/calibration work, power-up sequencing, and silicon bring-up, coordinating with analog, digital and firmware teams to achieve strong performance and yield.

Experience in high-speed SerDes, calibration algorithms and verification across analog and digital domains is essential. This role offers impactful responsibilities and complex system verification in a

Qualifications

• Bachelor’s Degree in Electrical Engineering with 2+ years of analog/mixed-signal IC design in nanometer CMOS/FinFET and 8+ years ASIC design or related work experience.
• Master’s degree in Electrical Engineering or related field with 8+ years ASIC design/verification experience.
• PhD in Electrical Engineering or related field with 6+ years ASIC design/verification experience.
• 2+ years experience using CADENCE, SPICE, MATLAB, or Verilog/VHDL.

Responsibilities

• Analog calibration: Collaborate with analog, digital and firmware teams to define and implement calibration algorithms for analog/mixed-signal blocks, optimizing performance and yield.
• Analog verification: Simulate analog subsystems at higher levels to confirm functionality and other characteristics (power, aging, EMIR).
• Analog design and architectures: Design various analog blocks (e.g., PLLs, clocking) and collaborate with analog/DSP/digital teams.
• System verification: Work with digital verification and firmware to ensure proper interaction among analog, digital and firmware components including initialization sequences and power-up calibration.
• Silicon validation support: Collaborate with silicon validation engineers to support bring-up activities and correlate pre-silicon models with post-silicon measurements.
• Power Estimation: Develop power models and simulate PCIe power-up sequences to meet product requirements with power/dissipation across data rate and conditions.
• Technical mentorship: Guide engineers in analog modeling, mixed-signal verification, calibration approaches and power estimation.

Skills

SerDes architecture

Analog/mixed-signal design

EDA tools

SystemVerilog

C language

Post-silicon measurements

Education

Bachelors in Electrical Engineering

Masters in Electrical Engineering

PhD in Electrical Engineering

Tools

Cadence

SPICE

MATLAB

Verilog/VHDL

Job description

Company:

Qualcomm Canada ULC

Job Area:

Engineering Group, Engineering Group > Analog Mixed Signal Design

General Summary:

Plan to use Mark on Gen7 analog lab/calibration support, PCIe L1ss power up sequencing tradeoffs and also help with some Gen8 clocking. New Position

Minimum Qualifications:

• Bachelor's Degree in Electrical Engineering with 2+ years of experience with analog or mixed‑signal integrated circuit design in nanometer planar CMOS or FinFET and 8+ years ASIC design, verification, or related work experience.
• Master's degree in Electrical Engineering or related field and 8+ years ASIC design, verification, or related work experience.
• PhD in Electrical Engineering or related field and 6+ years ASIC design, verification, or related work experience.
• 2+ years of experience using one or more design tools (e.g., CADENCE, SPICE, MATLAB, and/or Verilog/VHDL).

What You’ll Do

• Analog calibration: Collaborate with analog design, digital design, and firmware teams to define and implement calibration algorithms for analog/mixed‑signal blocks, optimizing performance and yield
• Analog verification: Simulate analog subsystems at higher levels of abstraction to confirm functionality as well as confirm other design characteristics (power, aging performance, EMIR, etc.)
• Analog design and architectures: As needed, design various analog blocks (e.g. PLLs, clocking etc). This will involve analog architecture, design and verification work, and collaboration with the analog/DSP/digital teams.
• System verification: Work closely with digital verification and firmware engineers to ensure proper interaction between analog, digital, and firmware components including register programming, initialization sequences, power‑up calibration, power state changes, and data rate changes
• Silicon validation support: Collaborate with silicon validation engineers to support silicon bring‑up activities and to correlate pre‑silicon models with post‑silicon measurements, improving model accuracy and debugging issues
• Power Estimation: Collaborate with analog and digital program leads to develop and maintain power models that accurately track power dissipation across data rate, operating conditions, and power states of high‑speed SerDes, and then correlate post‑silicon measurements with these power model predicted results. Engineer and simulate PCIe power up sequences and tradeoffs to manage package PI performance and meet product requirements.
• Technical mentorship: Guide and mentor engineers in analog behavioral modeling, mixed‑signal verification techniques, calibration approaches, and power estimation fostering innovation and technical excellence

What You’ll Need

• 15+ years of industry experience
• Strong background in high-speed (106Gbps and higher) SerDes architecture, modelling, and verification
• Knowledge of calibration algorithms, and equalization techniques for SerDes
• Previous experience in either high-speed analog / mixed‑signal design or modelling, analog/mixed‑signal or digital verification, or post‑silicon measurements of complex high‑speed wireline systems
• Strong understanding of analog design fundamentals, including analog‑to‑digital and digital‑to‑analog converters, clock generation and clock distribution, analog equalizers, and transmitter drivers, including the numerous mixed‑signal calibrations of these analog building blocks.
• Experience with EDA tools for schematic entry, and verification.
• Proficiency in digital RTL code (e.g., SystemVerilog language), firmware code (e.g., in C language), and digital verification tools and techniques

It’d Be Amazing If You Had

• Design experience with one or more of the following circuit blocks: continuous time linear equalizer, slicer, high-speed ADC, voltage‑controlled oscillator, phase interpolator, bandgap reference, voltage regulator, serializer, deserializer, voltage/current‑mode transmitter, phase‑locked loop, phase detector
• Hands‑on experience with SPICE simulators, AMS simulation tools (Cadence, Synopsys, or equivalent)
• Familiarity with PCIe, IEEE 802.3 (Ethernet) and OIF standards
• Scripting knowledge (Python, Matlab, etc.) for automation of power estimation and system verification
• Proficiency in using lab equipment such as oscilloscopes, TDR, VNA, and spectrum analyzers

Applicants

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e‑mail disability‑[e-mail] or call Qualcomm's toll‑free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

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Contact

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