ASICS Design Verification Engineer - Multiple levels

QUALCOMM, Inc.

Vancouver

On-site

CAD 108,000 - 158,000

Full time

7 days ago
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Job summary

Qualcomm Canada ULC in Vancouver seeks an experienced verification engineer to own the complete verification lifecycle for digital power IPs. You will perform pre-silicon test planning, develop testbenches with SystemVerilog-UVM, create coverage and assertion models, and contribute to formal verification.

You will help automate verification flows to improve efficiency, collaborating with the ASIC design team.

Qualifications

  • Bachelor's degree in Science or Engineering with 2+ years in ASIC design/verification.
  • Master's degree with 1+ year ASIC design/verification experience.
  • PhD in Science or Engineering.

Responsibilities

  • The team handles the complete verification lifecycle from system-level concept to tape-out and post-silicon support.
  • Perform comprehensive pre-silicon test planning for digital power IPs.
  • Develop testbenches using SystemVerilog-UVM; create coverage and assertion models.
  • Apply formal verification (property checking) techniques.
  • Learn and deploy power-aware UPF verification flow and automation to improve verification efficiency.

Skills

SystemVerilog / Verilog
UVM / OVM
C/C++ programming
Python / Perl scripting
Computer architecture

Education

Bachelor's degree in Science or Engineering
Master's degree in Science or Engineering
PhD in Science or Engineering

Tools

SystemVerilog tooling
UVM tooling
AMBA protocol knowledge
Formal verification tools

Job description

Company:

Qualcomm Canada ULC

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all.

Job Description

The team is responsible for the complete verification lifecycle, from system-level concept to tape out and post-silicon support. The responsibility of the position involves comprehensive pre-silicon test planning for digital power IP's, its testbench development using the advanced verification methodology such as SystemVerilog-UVM, coverage development, assertion model development and formal verification (property checking). Learn and deploy power-aware UPF verification flow and methodology. Involve in developing automation to improve verification efficiency.

Minimum Qualifications
  • Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
  • OR
  • Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
  • OR
  • PhD in Science, Engineering, or related field.
Qualifications
  • Bachelor's degree in Engineering, Science, or a closely related field
  • 2+ years of experience with ASIC design and verification tools, techniques, and methodology
Preferred Qualifications
  • Master’s degree in Computer Science, Electrical Engineer, Computer Engineering, or a closely related field
  • 6+ years of experience with ASIC design and verification tools, techniques, and methodology
  • 6+ years of experience with digital design concepts and RTL languages such as SystemVerilog or Verilog, or VHDL.
  • 6+ years of experience with computer architecture fundamentals, Object-oriented programming concepts and C or C++ programming skills.
  • 6+ years of experience with developing block-level testbench environment using SystemVerilog
  • 6+ years of experience with verification methodologies through coursework or past experiences such as UVM or OVM and exposure to Assertion based Formal Verification
  • 6+ years of experience with scripting/automation skills using either Perl or python
  • Experience with AMBA Bus protocol (AXI/AHB/APB etc) is desirable (not mandatory)
  • Knowledge or experience with Assertion Based Formal Verification is desirable (not mandatory)
Applicants

Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

To all Staffing and Recruiting Agencies

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Pay range and Other Compensation & Benefits

$108,000.00 - $158,000.00The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer.

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