Analog Design, Sr Staff Engineer - 10873

Synopsys, Inc.; Markham; On-site; CAD 100,000 - 140,000; Full time

Job summary

Join an innovative firm at the forefront of technology, where you will leverage your expertise in analog and mixed-signal design to create cutting-edge solutions for high-speed SerDes applications. As a key member of a collaborative team, your contributions will drive advancements in datacenters, automobiles, and communication networks. This role offers the opportunity to work with the latest CMOS technologies, mentor junior engineers, and make a significant impact in a fast-paced environment. Be part of a dynamic team that values innovation and excellence, and help shape the future of technology.

Benefits

Health benefits

Wellness programs

Financial benefits

Monetary rewards

Non-monetary rewards

Qualifications

• 8+ years of experience in CMOS analog and mixed-signal circuit design.
• Expertise in designing SerDes blocks and PLL components.

Responsibilities

• Designing and simulating circuit-level PLLs and analog circuits.
• Mentoring junior designers and coordinating with layout teams.

Skills

CMOS analog circuit design

Mixed-signal circuit design

PLL loop operation and design

VCO design

Charge pumps

Voltage regulators

High-speed dividers

Mentoring junior designers

FINFET technology

Hspice simulation

Education

MSEE or PhD

Bachelor’s degree

Tools

Hspice

Synopsys Custom Designer

PrimeTime

Nanotime

Job description

We Are:

“At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.”

You Are:

You are a highly skilled and experienced analog and mixed-signal design engineer with a passion for innovation and problem-solving. You thrive in a collaborative environment, where your technical expertise and leadership abilities can make a significant impact. You have a deep understanding of CMOS analog and mixed-signal circuit design, particularly in advanced FINFET and gate-all-around CMOS technology nodes. Your knowledge of PLL loop operation and design, coupled with your experience in designing SerDes blocks and PLL components such as VCOs, charge pumps, regulators, and high-speed dividers, sets you apart as a leader in your field. You are detail-oriented, with a strong ability to mentor and guide junior designers, ensuring the success of your team. You are excited to work on cutting-edge technology that powers the next generation of datacenters, automobiles, and communication networks.

What You’ll Be Doing:

- Designing and simulating circuit-level PLLs and top-level PLL models. - Developing analog circuits such as VCOs, charge pumps, and voltage regulators. - Creating custom circuit designs in deep-submicron and FINFET CMOS technologies. - Designing high-speed digital circuits, including dividers and clock distribution paths. - Performing schematic entry and spice simulation of custom circuits. - Providing mentoring and technical leadership to junior designers. - Coordinating and interfacing with layout and CAD teams to ensure seamless integration.

The Impact You Will Have:

- Contributing to the development of cutting-edge PLL designs that enable high-speed SerDes applications. - Driving innovation in datacenters, automobiles, and communication networks through advanced circuit design. - Enhancing the performance and reliability of high-speed digital circuits and analog components. - Supporting the adoption of the latest FINFET and gate-all-around CMOS technology nodes. - Empowering junior designers through mentorship and technical leadership. - Collaborating with cross-functional teams to deliver high-quality designs that meet industry standards.

What You’ll Need:

- 8+ years of experience in CMOS analog and mixed-signal circuit design with an MSEE or PhD (or equivalent experience with a Bachelor’s degree). - Detailed knowledge of PLL loop operation and design. - Expertise in designing SerDes blocks and PLL components such as VCOs, charge pumps, regulators, and high-speed dividers. - Experience with FINFET and gate-all-around CMOS technologies. - Proficiency in spice-type simulators such as Hspice, Finesim, or PrimeSim. - Familiarity with schematic entry tools like Synopsys Custom Designer or similar platforms. - Knowledge of digital timing tools like PrimeTime and/or Nanotime is a plus.

Who You Are:

- A collaborative team player with strong communication skills. - A detail-oriented problem solver who thrives in a fast-paced environment. - A mentor and leader who inspires and guides junior team members. - A forward-thinker with a passion for innovation and continuous learning. - A results-driven professional committed to delivering high-quality designs.

The Team You’ll Be A Part Of:

You will join the PLL design team, a group of talented engineers dedicated to creating innovative analog and mixed-signal designs. The team focuses on enabling high-speed SerDes applications for datacenters, automobiles, and communication networks. Together, you will work on cutting-edge technology, leveraging the latest CMOS advancements to deliver impactful solutions.

Rewards and Benefits:

“We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.”

Should you require an accommodation, please [e-mail].