Senior/Staff Engineer, Component Validation, HIG HBM

MICRON SEMICONDUCTOR ASIA OPERATIONS PTE LTD

Região Norte

On-site

BRL 180,000 - 280,000

Full time

3 days ago
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Job summary

Micron Semiconductor Asia Operations PTE LTD in Brazil’s Norte region seeks a senior test engineer to drive validation for HBM components. You will craft robust test programs and lead cross-functional activities across validation platforms.

You will work with Teradyne/Advantest platforms, develop patterns in C/C++ and Python, and guide a team through milestones, quality, and release processes. This role emphasizes scalable test infrastructure and technical mentorship.

Qualifications

  • BSc/MSc in Electrical/Computer Engineering with 5+ years in semiconductor product engineering.
  • 5+ years in test pattern and code development with C/C++, Python on ATE (Teradyne, Advantest etc) and familiarity with APG.
  • 5+ years technical experience as Product Development Engineering lead.
  • Experience implementing DFT/functional testing and knowledge of DRAM/HBM concepts.

Responsibilities

  • Develop and maintain test programs for HBM validation.
  • Deliver test program releases aligned with validation milestones and drive code quality.
  • Drive test time optimization and parallelism improvements.
  • Enhance test stability across sites and equipment.
  • Coach engineers in validation approaches, platform nuances, and reporting standards.
  • Maintain documentation in Confluence/Jira and version control in Git/Perforce.

Skills

C/C++
Python
Test automation
APG
DFT
Semiconductor

Education

Bachelor/Master in Electrical & Electronic or Computer Engineering

Tools

Teradyne
Advantest
Git
Perforce
Confluence
Jira

Job description

Why Join Us

You’ll gain hands-on experience with cutting-edge HBM technologies and validation platforms, working alongside global experts. This role offers opportunities to learn advanced validation techniques, drive and deliver product readiness, technology solutions and innovations, and grow into technical leadership roles.

Responsibilities:

Test program development SME:

  • Drive and develop and maintain test programs for HBM component validation
  • Deliver timely test program releases aligned with validation milestones and drive code quality, reviews, and release best-practices
  • Drive test time optimization and parallelism improvements
  • Drive test stability and repeatability across sites and equipment
  • Drive test program debug on multiple testers
  • Coach and develop technical growth of other engineers in validation approaches, platform nuances, simulation methodology, and reporting standards.

Test Infrastructure:

  • Drive test equipment qualification and re-qualification
  • Drive hardware readiness setup for handler, socket etc.
  • Perform validation capacity forecasting based on product ramps and coverage needs
  • Owns validation platform health, availability and uptime.
  • Support validation platform pathfinding.

Other responsibilities may include (and not limited to):

  • Define/implement new standards for continuous improvement in test program development and validation test infrastructure.
  • Validating high-speed I/O and assist with eye diagram and signal integrity checks.
  • Maintaining documentation in Confluence/Jira and version control in Git/Perforce.
  • Drive root cause analysis sessions and corrective action closure.
  • Drive/ collaborate across Component Validation team and with cross-functional teams for design validation, execution, electrical failure analysis, lab support and others.
Minimum Qualifications
  • Bachelor/Master’s degree in Electrical & Electronic or Computer Engineering (or related) with 5+ years relevant experience in semiconductor product engineering (DRAM/HBM preferred)
  • 5+ years hands-on test pattern and code development experience using C/C++, Python on ATE (Teradyne, Advantest etc) and familiarity with APG (Algorithmic Pattern Generator).
  • 5+ years technical experience as Product Development Engineering lead.
  • Demonstrated technical work experience implementing DFT/ functional testing (loopback, MBIST, scan etc) and relevant knowledge in Computer Architecture/DRAM concepts and flows. Applicants with relevant experience in Analog Mixed Signal design and verification or ASIC design and verification or silicon validation may be considered.
Preferred experience:
  • Relevant semiconductor engineering experience implementing/ leveraging AI for automation and continuous improvement initiatives.
  • Strong communication, analytical and problem-solving skills; flexibility to work in a fast-paced environment.
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