MTS, FECOS CPIE DEVICE

MICRON SEMICONDUCTOR ASIA OPERATIONS PTE LTD; Região Norte; Vor Ort; BRL 200.000 - 380.000; Vollzeit

Zusammenfassung

Micron Semiconductor Asia Operations PTE LTD is seeking a Principal Device Integration Engineer to lead technology ramp in high-volume CMOS and memory production. You will drive device performance, variability reduction, and manufacturability improvements while collaborating with a global Micron network.

The role requires deep semiconductor physics knowledge, experience in wafer fab processes, and strong data analysis skills.

Qualifikationen

• Minimum 5 years of relevant working experience.
• Master's or PhD preferred in Physics or Engineering.
• Experience in wafer fab process or process integration engineering; advanced CMOS like FinFET or GAA preferable.

Aufgaben

• Enable technology ramp in high-volume production for CMOS and memory devices.
• Improve device performance focusing on variability reduction and robustness.
• Support design and test optimisation to enhance manufacturability and performance.
• Identify and implement process simplification and working methodology improvements.
• Lead or contribute to cross-functional problem-solving for device, yield, and quality issues.

Kenntnisse

Data analysis

Python

Problem-solving

MS Office

Team collaboration

Self-motivated

Ausbildung

Master's or PhD in Physics or Engineering

Tools

JMP

Spotfire

Python

Jobbeschreibung

Principal Device Integration Engineer in Micron's Central Manufacturing Team responsible for enabling technology ramp in production and product yield & quality improvement by working collaboratively with Micron global network on CMOS and Memory device performance enhancement, variability reduction, design and test optimization, process simplification and working methodology improvement.

Job Responsibilities

• Enable technology ramp in high-volume production for CMOS and memory devices.
• Improve device performance with a focus on variability reduction and robustness.
• Support and execute design and test optimisation to enhance manufacturability and performance.
• Identify and implement process simplification and working methodology improvements.
• Lead or actively contribute to cross-functional problem-solving for device, yield, and quality issues.

Job Requirements

• Minimum 5 years of relevant working experience is required. A master's or . Ph.D. degree in Physics or Engineering areas is preferred.
• Working experience in wafer fab process or process integration engineering. . Direct experience in advanced CMOS device technology such as FinFET or GAA is preferable.
• Proven knowledge in semiconductor physics and understanding of transistor operations, scaling limitations and reliability, basic knowledge of CMOS circuits and characterisation methods.
• Understanding of wafer fabrication process areas, including tool sets, process mechanisms, tuning knobs, etc.
• Excellent data analysis skills using software (JMP, SPOTFIRE, etc).
• Strong task ownership, self-motivated to work with other team members to make progress collaboratively.
• Open-minded attitude to learn new skills and could adapt to a new working environment swiftly.
• Good digital literacy with MS Office. Programming capability such as Python is a plus.
• Occasional international business travel is required for this position.