Application Engineer I: Formal Verification

Cadence Design Systems; Belo Horizonte; Presencial; BRL 80.000 - 120.000; Tempo integral

Resumo da oferta

A Cadence Design Systems busca um Engenheiro de Aplicações I para trabalhar em Belo Horizonte, focando em Verificação Formal. O papel envolve suporte técnico em soluções de verificação e colaboração com clientes para entender suas necessidades. Requisitos incluem bacharelado em engenharia e habilidades em linguagens de script como TCL e Python. A oportunidade oferece um ambiente inovador em uma empresa altamente reconhecida.

Serviços

Benefícios competitivos

Qualificações

• Bacharel em áreas relacionadas a engenharia.
• Excelentes habilidades de comunicação verbal e escrita em português e inglês.
• Interesse em sucesso do cliente com EDA e desenvolvimento de hardware.

Responsabilidades

• Fornecer suporte técnico a clientes em soluções de verificação RTL.
• Realizar análise de causas raiz e resolver problemas técnicos.
• Colaborar com a equipe de P&D sobre problemas usando protocolos estabelecidos.

Conhecimentos

Boa comunicação

Solução de problemas

Interação com clientes

Formação académica

Bacharel em Engenharia Elétrica, Engenharia de Controle e Automação, Sistemas de Computação, Ciência da Computação, Sistemas de Informação, Matemática Computacional ou áreas relacionadas

Ferramentas

TCL

Python

Descrição da oferta de emprego

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence Design Systems Inc. is looking for a motivated Application Engineer I: Formal Verification to work with us in Belo Horizonte, Brazil.

As an Application Engineer, you will be trained to become an expert in Formal Verification methodologies in the System Verification Group - Technical Field Operations group (TFO-SVG) in Belo Horizonte. The TFO-SVG group works with Jasper, Xcelium, Palladium, Protium, VIPs, and other Cadence Digital Functional Verification tools. The application engineers provide technical support, enabling customers to effectively deploy our industry-leading technology, focused on RTL-level verification products. You will be in a Formal Verification focused team working with our Jasper Formal Verification Platform and its customers to understand their needs and provide guidance on the best technologies and methodologies to enable their success, coming up with innovative solutions to address the industry most challenging problems.

Job Description:

• Activities focused on the Formal Verification field as mentioned above, reporting to higher management.
• Provide technical support to customers and field personnel in RTL verification solutions focused on the Jasper tool.
• Conduct root cause analysis and provide resolution to customer technical issues.
• Run customer test cases to verify problems, create workarounds when possible, test and deliver R&D fixes.
• Close collaboration with R&D on issues using established protocols.
• Author application notes and help provide feedback on documentation.
• Use scripting languages like TCL and Python for flow development, automation and enhancing design methodologies.
• Engage with AE team on Pre-sales technical campaigns from the technical side, working along with Sales and Marketing.

Requirements:

• Complete Bachelor in Electrical Engineering, Control and Automation Engineering, Systems Engineering, Electronics Engineering, Computer Science, Information Systems, Computational Mathematics, or related areas.
• Excellent verbal and written communications skills in Portuguese and English.
• Good problem-solving skills.
• Strong inter-personal and communication skills.
• A strong interest in contributing to customer success with related technical interest in EDA, hardware development (HDL's), and Logic Design.

Nice to have:

• Experience in scripting languages such as TCL and Python is a plus.
• Exposure to RTL (Verilog or VHDL).
• Knowledge of Formal Methods is a plus.
• Exposure to microelectronics and or EDA, with experience on verification methodologies as formal verification, functional verification (simulation), or model verification. Knowledge of Cadence verification tools is a plus.

Additional Job Details:

• Employment category: CLT.
• Employment term: 40 hours/week.
• Competitive benefits.
• Av. do Contorno, 5800, Belo Horizonte, Minas Gerais, Brazil

About Cadence Design Systems:

At Cadence, we hire and develop leaders and innovators who want to impact the world of technology. Cadence has been nominated as a Great Place to Work globally and in Brazil and is also a Fortune 100 Best Companies to Work For .

Cadence is the only company that provides the expertise and tools, IP, and hardware required for the entire electronics design chain, from chip design to chip packaging to boards and to systems. We enable electronic systems and semiconductor companies to create innovative products that transform the way people live, work, and play. Our products are used in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. For more information, access http://www.cadence.com .

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