Application Engineer I: Digital Verification & Simulation - System Level Testing

Cadence; Belo Horizonte; Presencial; BRL 70.000 - 90.000; Tempo integral

Resumo da oferta

A Cadence procura um(a) Application Engineer I focado em Verificação e Simulação Digital em Belo Horizonte. Nesta função, será responsável por fornecer suporte técnico, colaborar com clientes e desenvolver testes na área de verificação RTL, utilizando ferramentas avançadas. O candidato ideal terá um bacharelado em Engenharia e competências técnicas em scripting e comunicação.

Serviços

Benefícios competitivos

Qualificações

• Bacharelado completo em áreas de engenharia ou ciências computacionais.
• Excelentes habilidades de comunicação verbal e escrita em português e inglês.
• Interesse em desenvolvimento técnico e sucesso do cliente.

Responsabilidades

• Fornecer suporte técnico em soluções de verificação RTL com a ferramenta Perspec System Verifier.
• Colaborar com a equipe de R&D em questões técnicas e melhorias.
• Realizar análises de causa raiz e desenvolver testes para verificar problemas.

Conhecimentos

Comunicação

Resolução de Problemas

Interação Pessoal

Formação académica

Bacharelado em Engenharia Elétrica, Engenharia da Computação, ou áreas relacionadas

Ferramentas

TCL

Python

Descrição da oferta de emprego

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At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence Design Systems Inc. is looking for a motivated Application Engineer I: Digital Verification & Simulation - System Level Testing to work with us in Belo Horizonte, Brazil.

As an Application Engineer, you will be trained to become an expert in Digital Verification & Simulation methodologies in the System Verification Group - Technical Field Operations (TFO-SVG) in Belo Horizonte. This group works with Xcelium, Palladium, Protium, Jasper, VIPs, Perspec, and other Cadence Digital Functional Verification tools.

The application engineers provide technical support, enabling customers to effectively deploy our industry-leading technology, focused on RTL-level verification products. You will be in a Digital Verification & Simulation focused team working with our Perspec System Verifier, complimentary tools, and its customers to understand their needs and provide guidance on the best technologies and methodologies to enable their success, coming up with innovative solutions to address the industry’s most challenging problems.

Job Description

• Activities focused on the Functional Verification field as mentioned above, reporting to higher management.
• Provide technical support in engagements with customers and field personnel in RTL verification solutions focused on the Perspec System Verifier tool and other supporting technologies.
• Contribute to technical and sales meetings interacting with engineers, technical leads and executives.
• Conduct root cause analysis and provide resolution to customer technical issues.
• Develop and run testcases to verify problems, create workarounds, test and deliver R&D fixes.
• Close collaboration with R&D on issues using established protocols.
• Author application notes and help provide feedback on documentation.
• Use scripting languages like TCL and Python for flow development, automation and enhancing design methodologies.
• Engage with AE team on pre-sales and post-sales technical campaigns from the technical side, working along with Sales and Marketing to plan deployment, conduct technical evaluations and support.
  
  

Requirements

• Complete bachelor’s in Electrical Engineering, Computer Engineering, Electronics Engineering, Control and Automation Engineering, Systems Engineering, Computer Science, Information Systems, Computational Mathematics, or related areas.
• Excellent verbal and written communications skills in Portuguese and English.
• Good problem-solving skills.
• Strong inter-personal and communication skills.
• A strong interest in debug and contributing to customer success with related technical interest in EDA, hardware development (HDL's), Logic Design/Verification and the semiconductor industry.
  
  

Nice To Have

• Exposure to RTL (Verilog or VHDL).
• Exposure to SoC verification is a plus.
• Knowledge of verification methodologies such as UVM is a plus.
• Experience in scripting languages such as TCL and Python is a plus.
• Exposure to microelectronics, semiconductors and or EDA, with experience on functional verification (simulation), model verification, or Verification IP.
• Knowledge of Cadence verification tools is a plus.
  
  

Additional Job Details

• Employment category: CLT.
• Employment term: 40 hours/week.
• Competitive benefits.
• Location: Av. do Contorno 5800, Savassi, Belo Horizonte, Minas Gerais
  
  

About Cadence Design Systems

At Cadence, we hire and develop leaders and innovators who want to impact the world of technology. Cadence has been nominated as a Great Place to Work globally and in Brazil and is also a Fortune 100 Best Companies to Work For.

Cadence is the only company that provides the expertise and tools, IP, and hardware required for the entire electronics design chain, from chip design to chip packaging to boards and to systems. We enable electronic systems and semiconductor companies to create innovative products that transform the way people live, work, and play. Our products are used in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. For more information, access http://www.cadence.com

We’re doing work that matters. Help us solve what others can’t.

Seniority level

• Seniority level

  Entry level

Employment type

• Employment type

  Full-time

Job function

• Job function

  Engineering and Information Technology

• Industries

  Software Development

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