Space-Grade FPGA Design Engineer (VHDL)

Celestia Antwerp BV; Berchem; Sur place; EUR 60 000 - 90 000; Plein temps

Résumé du poste

Celestia Antwerp BV in Berchem, Belgium is seeking an FPGA Design Engineer (VHDL) to design and implement FPGA subsystems, run simulations, and integrate modules within complex space-grade systems.

The role requires strong VHDL, digital logic knowledge, and experience with FPGA design tools; you will collaborate with hardware, software, and system engineers in a highly innovative space environment.

Qualifications

• Master's degree in engineering or equivalent.
• Strong VHDL programming and HDL skills.
• Experience with digital logic, timing constraints, and clock domains.
• Familiarity with FPGA design tools (Questa/ModelSim, Intel Quartus).
• Knowledge of Ethernet/SERDES is a plus.
• Ability to write technical documentation.

Responsabilités

• Design and implement FPGA sub-systems in VHDL.
• Perform simulations and verifications (Questa, ModelSim).
• Integrate FPGA modules into larger system architectures.
• Document design and test results.
• Collaborate with hardware, software, and systems engineers.
• Engage in FPGA troubleshooting and technical conferences.

Connaissances

VHDL

Digital logic

Ethernet/SERDES

ARM processors

Technical documentation

Team player

Formation

Master's degree in engineering

Outils

Questa

Modelsim

Intel Quartus

Description du poste

Celestia Antwerp BV in Berchem, Belgium is seeking an FPGA Design Engineer (VHDL) to design and implement FPGA subsystems, run simulations, and integrate modules within complex space-grade systems.

The role requires strong VHDL, digital logic knowledge, and experience with FPGA design tools; you will collaborate with hardware, software, and system engineers in a highly innovative space environment.