Senior FPGA-Based SoC Prototyping Lead

u-blox; Vlaams-Brabant; Hybride; EUR 78 000 - 103 000; Plein temps

Résumé du poste

u-blox is seeking an experienced FPGA based SoC Prototyping engineer to drive the prototyping strategy and validate prototypes across hybrid sites in Thalwil, Leuven and Athens. You will bridge hardware and firmware teams to accelerate early firmware development and ensure on-time delivery of functional prototypes.

You will port ASIC RTL to FPGA-friendly RTL, manage mapping, constraints, and verify results in simulations and lab setups.

Qualifications

• Hands-on experience delivering multiple full SoC cycles with FPGA prototypes.
• Expertise with AMD Ultrascale+ and FPGA backend flows.
• Ability to troubleshoot hardware, firmware and software interop.
• Strong problem-solving mindset and proactive, detail-oriented work style.
• Solid ASIC design knowledge: architecture, clocks, verification, modeling.

Responsabilités

• Own the FPGA based SoC prototyping strategy, implementation and validation.
• Port RTL to FPGA-friendly designs, manage floorplanning and constraints.
• Coordinate design and firmware alignments to deliver early prototypes.
• Improve internal FPGA prototyping flows and verification approaches.
• Provide hardware/firmware system bring-up and user support.

Connaissances

FPGA-based SoC prototyping

AMD Ultrascale+

Altera FPGA backend flow

ASIC/SoC design & verification

Hardware/firmware troubleshooting

Floorplanning & constraints

System bring-up

Outils

Simulation tools

Lab measurement equipment

AMD/Altera toolchains

Description du poste

u-blox is seeking an experienced FPGA based SoC Prototyping engineer to drive the prototyping strategy and validate prototypes across hybrid sites in Thalwil, Leuven and Athens. You will bridge hardware and firmware teams to accelerate early firmware development and ensure on-time delivery of functional prototypes.

You will port ASIC RTL to FPGA-friendly RTL, manage mapping, constraints, and verify results in simulations and lab setups.