Senior FPGA based SoC Prototyping Engineer

u-blox

Vlaams-Brabant

Hybride

EUR 78 000 - 103 000

Plein temps

Il y a 2 heures
Soyez parmi les premiers à postuler
Générateur de candidature

Une candidature complète en une minute — un CV et une lettre de motivation personnalisés, prêts à être envoyés.

Passez les filtres ATS

Résumé du poste

u-blox is seeking an experienced FPGA based SoC Prototyping engineer to drive the prototyping strategy and validate prototypes across hybrid sites in Thalwil, Leuven and Athens. You will bridge hardware and firmware teams to accelerate early firmware development and ensure on-time delivery of functional prototypes.

You will port ASIC RTL to FPGA-friendly RTL, manage mapping, constraints, and verify results in simulations and lab setups.

Qualifications

  • Hands-on experience delivering multiple full SoC cycles with FPGA prototypes.
  • Expertise with AMD Ultrascale+ and FPGA backend flows.
  • Ability to troubleshoot hardware, firmware and software interop.
  • Strong problem-solving mindset and proactive, detail-oriented work style.
  • Solid ASIC design knowledge: architecture, clocks, verification, modeling.

Responsabilités

  • Own the FPGA based SoC prototyping strategy, implementation and validation.
  • Port RTL to FPGA-friendly designs, manage floorplanning and constraints.
  • Coordinate design and firmware alignments to deliver early prototypes.
  • Improve internal FPGA prototyping flows and verification approaches.
  • Provide hardware/firmware system bring-up and user support.

Connaissances

FPGA-based SoC prototyping
AMD Ultrascale+
Altera FPGA backend flow
ASIC/SoC design & verification
Hardware/firmware troubleshooting
Floorplanning & constraints
System bring-up

Outils

Simulation tools
Lab measurement equipment
AMD/Altera toolchains

Description du poste

Are you ready to challenge your expertise in the field of FPGA based SoC prototyping and enable shorter time to market product deliveries playing a key role between design and firmware teams?

U-Blox SoC Verification team is expanding its mission and looking for a talented and experienced FPGA based SoC Prototyping engineer. Our members are passionate experts who thrive for solving concrete challenging problems paving the way to deliver to U-Blox customers the best products on time. In addition to that, you will experience true opportunities of self-initiative and empowerment of individuals willing to take an active role in our flat verification organization. If you are looking for true challenges and growth, the team is looking forward to hearing from you.

You are an ASIC/SoC digital design and or verification engineer, with prior achievements in FPGA based ASIC/SoC prototyping missions and are interested in scaling up your impact and responsibilities, then we would like to talk to you.

We encourage you to apply if this role excites you – even if you think you may not meet all the requirements. We are always looking for curious, outstanding individuals and great potential.

This is full-time hybrid working role available in Thalwil (Switzerland), Leuven (Belgium) and Athens (Greece). We are an equal opportunity employer and do not accept unsolicited applications from staffing agencies.

Your mission:
  • Take ownership of the FPGA based SoC prototyping strategy, implementation and prototypes validation. This covers also the hardware setup.
  • Port ASIC RTL into FPGA friendly and synthesizable RTL, mapping (Floorplan, constraints) and verify it using Simulation and in Lab environment.
  • Achieve alignments between the design and the firmware teams to deliver on-time as required functional prototypes versions which enable us to achieve early firmware development.
  • Continuous improvement of the internal FPGA prototyping flows and methodology (verification and back-end).
  • Hardware / Firmware System bring-up, troubleshooting and support the prototype users.
Your Skills and Experience:
  • Hands on experience of multiple successful full SoC project cycles where you have achieved FPGA prototypes of Low Power SoC’s on AMD and Altera and the associated support and trouble shooting. AMD Ultrascale+ is a must.
  • Firm expertise in AMD and Altera FPGA backend flow.
  • Experience in troubleshooting systems which combine hardware platforms, design, and firmware.
  • A problem-solving mind set and experience: curious, proactive, detail-oriented, doer and motivated by shared success.
  • Solid experience in ASIC design knowledge (architecture, clock tree, verification, modeling).
What you will live:
  • Contribute and evolve within a flat team of experts where knowledge sharing and collaboration while allowing space for individual initiatives to drive our success who has already achieved multiple successful products to the market.
  • Contribute to cutting edge GNSS SoC’s products addressing every aspect that matters to our customers (time to market, performance, quality, cost).
  • Join a multi-cultural multi-site environment that values both technical excellence and team spirit.

Learn more about u-blox and its mission by watching this video!

We see diversity as a strength and promote a culture of inclusion among our employees. Our varied backgrounds, ideas and experiences are critical to our success. We strive to become a strong learning organization and are committed to provide our employees with equal opportunities regardless of differences such as gender, race, ethnicity, generations, belief.

Obtenez votre examen gratuit et confidentiel de votre CV.
ou faites glisser et déposez votre fichier ici.
Similar jobs

Postes similaires à comparer

Senior FPGA-Based SoC Prototyping Lead
Senior FPGA-Based SoC Prototyping Lead

u-blox • Vlaams-Brabant

Hybride
EUR 78 000 - 103 000
Senior FPGA Engineer
Senior FPGA Engineer

Industrious Ventures • Louvain-la-Neuve

Sur place
EUR 65 000 - 85 000
FPGA Designer (M/F/X)
FPGA Designer (M/F/X)

Deltatec • Luik

Hybride
EUR 50 000 - 70 000
Company car
Meal vouchers
Insurance
+3
Senior FPGA Designer (H/F/X)
Senior FPGA Designer (H/F/X)

Deltatec • Luik

Hybride
EUR 90 000 - 120 000
Dynamic culture
Exciting technologies
Competitive salary package
+3
Digital Verification Engineer
Digital Verification Engineer

EURAXESS Ireland • Heverlee

Sur place
EUR 60 000 - 80 000
Market-appropriate salary
Fringe benefits
Support for personal development
Digital Verification Engineer
Digital Verification Engineer

EURAXESS Czech Republic • Heverlee

Sur place
EUR 55 000 - 70 000
Market-appropriate salary
Fringe benefits
Professional development opportunities
Digital Verification Engineer
Digital Verification Engineer

Euraxess • Heverlee

Sur place
EUR 60 000 - 80 000
Market-appropriate salary
Fringe benefits
Investment in professional development
FPGA engineer
FPGA engineer

Verhaert On-Site Consulting • Belgique

Sur place
EUR 60 000 - 90 000
FPGA engineer
FPGA engineer

Verhaert Masters in Innovation • Belgique

Sur place
EUR 55 000 - 75 000
Continuous learning opportunities
Career growth
Collaborative engineering culture
Electronics Engineer
Electronics Engineer

Sphere Defense • Brussel Hoofdstad

Sur place
EUR 70 000 - 110 000
Attractive compensation
Year-end bonus eligibility
Stock Options Plan eligibility
+4