Physical Design Engineer: Impactful ASIC/SoC Delivery

IC Resources Recruitment; Town of Cambridge; On-site; AUD 106,000 - 173,000; Full time

Job summary

IC Resources Recruitment in Cambridge is seeking a Physical Design Engineer to contribute across the full chip development lifecycle, from initial design stages to silicon delivery and product launch.

You will work on floorplanning, power planning, placement, timing closure, routing, and verification within a small team, gaining broad exposure and making a meaningful impact on product development.

Qualifications

• Strong academic background in Electronics or Electrical Engineering.
• Minimum of two years in Physical Design or Physical Implementation.
• Solid understanding of ASIC implementation flows and methodologies.
• Good communication and cross-functional collaboration skills.

Responsibilities

• Contribute to the complete physical design implementation process, from netlist to GDSII.
• Engage in floorplanning, power planning, placement, optimization, clock tree synthesis, routing, and physical verification closure.
• Perform timing closure and static timing analysis.
• Conduct logic synthesis, equivalence checking, and place-and-route methodologies.
• Work on complex ASIC or SoC designs in advanced semiconductor environments.

Skills

Physical design

ASIC/SoC flows

Netlist to GDSII

Education

Bachelor's degree in Electronics or Electrical Engineering

Job description

Physical Design Engineer Overview

Company Name	IC Resources Recruitment
Job Role	Physical Design Engineer
Qualifications	Not Specified
Category	IT Jobs
Job Type	Full Time
Location	Cambridge

An established technology company located in Cambridge is seeking a Physical Design Engineer to join their growing team. This position offers an excellent opportunity to work within a collaborative environment, contributing throughout the entire chip development lifecycle, from initial design stages to silicon delivery and product launch. The team is relatively small, allowing engineers to gain broad exposure and make a significant impact on product development.

Key Responsibilities

• Contribute to the complete physical design implementation process, from netlist to GDSII.
• Engage in floorplanning, power planning, placement, optimization, clock tree synthesis, routing, and physical verification closure.
• Perform timing closure and static timing analysis.
• Conduct logic synthesis, equivalence checking, and place-and-route methodologies.
• Work on complex ASIC or SoC designs in advanced semiconductor environments.

Requirements

• Possess a strong academic background in Electronics, Electrical Engineering, or a related field.
• Have a minimum of two years of industry experience in Physical Design or Physical Implementation.
• Demonstrate a solid understanding of modern ASIC implementation flows and methodologies.
• Exhibit strong communication skills and the ability to collaborate effectively within cross-functional engineering teams.

This is a fantastic opportunity to join a company with a strong engineering culture, work on technically challenging products, and become part of a close-knit team where your contributions will have a direct impact. For further details on this opportunity or other Physical Design positions across the UK and Europe, please reach out to Jordan Browne.

Degree Requirement: Not Specified

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