Wireless RTL Design Engineer

Apple Inc.; Irvine (CA); On-site; USD 180,000 - 240,000; Full time

Job summary

Apple Inc. in Irvine, CA is seeking a senior engineer to join the wireless silicon development team focused on energy-efficient design for wireless system-on-chip.

You will define microarchitecture, RTL, and verification for wireless SoCs, collaborate with RF/Analog, Systems/PHY/MAC, and FW/SW teams, and contribute to high-volume product readiness.

Qualifications

• BS and a minimum of 10 years relevant industry experience.
• Knowledge of fixed-point design and bit-true verifications.
• Understanding DSP algorithms and performance-power trade-offs.
• Strong team collaboration and excellent communication.

Responsibilities

• Write specifications and documents from MATLAB/C models.
• Define microarchitecture and RTL design & verification.
• Run tools to ensure lint-free design.
• Collaborate with algorithm and software teams for performance and power.

Skills

DSP algorithms

Fixed-point knowledge

RTL design basics

Energy-efficient design

Team collaboration

Excellent communication

Education

BS with 10+ years industry experience

Tools

Synthesis tools

CDC analysis

Power analysis

MATLAB

RTL verification

Job description

Summary

Would you like to join Apple’s growing wireless silicon development team? Our wireless SOC organization is responsible for all aspects of wireless silicon development with a particular emphasis on highly energy efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering.

Description

In this highly visible role, you will be at the center of a silicon design group with a critical impact on getting functional products to hundreds of millions of customers quickly. You will develop signal processing intensive design for wireless communication SoCs with diverse connectivity technologies.Will you join us and do the best work of your life here?

Key Responsibilities

Writing specifications and other documents based on MATLAB/C system modelMicroarchitecture definitionRTL logic design and verification supportRunning tools to ensure lint-free designCollaboration with algorithm and software team to ensure performance and power efficiency

Minimum Qualifications

BS and a minimum of 10 years relevant industry experienceSome level of fixed-point knowledge and experience with bit-true verificationsUnderstanding of DSP communication algorithms and trade-offs between performance and complexityGood knowledge in modern design techniques and energy-efficient/low power logic designAbility to work well in a team and be productive under aggressive schedulesExcellent communication skills and self-motivated

Preferred Qualifications

Experience in front end CAD tools such as synthesis, CDC and power analysis