Winter/Spring 2027 Digital IC Design Co-op

Skyworks Solutions, Inc.; New Buffalo (IA); On-site; USD 40,000 - 68,000; Full time

Job summary

Skyworks Solutions, Inc. is seeking a Digital IC Design Co-op for Winter/Spring 2027 in Cedar Rapids to work with digital design, verification, and test teams on RTL and production vectors.

You will gain hands-on experience with RTL coding (VHDL/Verilog/SystemVerilog), Python automation, and lab testing while contributing to design reviews and documentation, with potential for future full-time opportunities.

Qualifications

• Enrollment in Electrical Engineering, Computer Engineering, or related BS/MS/PhD program.
• Commitment to onsite January–June 2027.
• Experience with VHDL/Verilog RTL coding preferred.
• Python for verification/automation is a strong plus.
• Exposure to Cadence Xcelium, Genus, Innovus, or equivalent tools is helpful.

Responsibilities

• Design and develop digital IC blocks for multi-chip modules.
• Create/modify RTL (VHDL, Verilog, SystemVerilog) for digital subsystems.
• Run simulations using Cadence Xcelium or Synopsys VCS.
• Develop Python-based verification scripts for automation and data analysis.
• Assist in generating production test vectors and support digital final test.
• Participate in design and code reviews, presenting results and intent.
• Support lab evaluation with oscilloscopes, logic analyzers, pattern generators.
• Troubleshoot RTL, simulation, or verification issues.
• Collaborate with digital, analog, RF, product, and test engineers.
• Maintain simple internal web-based design tracking tools (HTML/JavaScript).

Skills

RTL design interest

Team collaboration

Willingness to learn

Education

BS/MS/PhD in Electrical Engineering, Computer Engineering, or related

Tools

Cadence Xcelium

Genus

Innovus

Python

Job description

Skyworks Solutions, Inc. is seeking a Digital IC Design Co-op for Winter/Spring 2027 in Cedar Rapids to work with digital design, verification, and test teams on RTL and production vectors.

You will gain hands-on experience with RTL coding (VHDL/Verilog/SystemVerilog), Python automation, and lab testing while contributing to design reviews and documentation, with potential for future full-time opportunities.