VP, Computer Architect (DCAI)

SBT; Portland (OR); On-site; USD 180,000 - 280,000; Full time

Job summary

SBT, the exclusive executive recruiting firm for this confidential position, is partnering with a startup developing next‑gen compute silicon to accelerate AI, ML, and large‑scale computing. The role offers the chance to shape foundational architecture and influence product strategy from the earliest stages in a fast‑paced, collaborative environment.

The ideal candidate has 10+ years in semiconductor architecture, with proven leadership of complex SoCs from architecture through tapeout and

Qualifications

• Deep expertise in architecture and development of high-performance CPU/GPU/SoCs.
• Lead architecture for AI training, LLM inference, HPC and accelerators.
• Strong background in microarchitecture, memory systems and interconnects.
• Experience with ARM, x86, or RISC-V architectures is valuable.
• Experience taking SoCs from arch through tapeout and mass production.

Responsibilities

• Define and optimize CPU/GPU microarchitecture and memory hierarchy.
• Lead architectural performance modeling and PPA optimization.
• Drive decisions on chiplet-based designs and scalable compute platforms.
• Guide integration of CPU/GPU subsystems and AI accelerators.

Skills

CPU/GPU architecture

SoC development

Performance modeling

System-level optimization

Architectural validation

Education

MS or PhD in Electrical/Computer Engineering/CS

Job description

SBT is the exclusive executive recruiting firm for this confidential position.

This confidential startup company is developing next-generation high-performance compute silicon to accelerate the future of AI, machine learning, and large-scale computing. Backed by experienced technology leaders and an ambitious product vision, the company is building innovative CPU, GPU, and advanced SoC solutions designed to deliver breakthrough performance, scalability, and efficiency. Joining this team offers the opportunity to shape foundational architecture, influence product strategy from the earliest stages, and make a lasting impact in a fast-paced, highly collaborative environment.

Technical Background

• Deep expertise in the architecture and development of high-performance CPU, GPU, or heterogeneous SoCs from architectural definition through silicon validation and high-volume production.


• Drive system architecture for next-generation compute platforms supporting AI training, LLM inference, HPC, graphics, and accelerated computing workloads.


• Define and optimize CPU/GPU microarchitecture, memory hierarchy, cache subsystems, interconnect fabrics (AMBA CHI, NoC, PCIe, CXL, UCIe), and system-level performance.


• Lead architectural performance modeling, simulation, workload analysis, and Power/Performance/Area (PPA) optimization across the SoC.


• Drive technical decisions across CPU/GPU subsystem integration, memory architecture, AI accelerators, chiplet-based designs, and scalable compute platforms.

Qualifications

• M.S. or Ph.D. in Electrical Engineering, Computer Engineering, Computer Science, or related discipline.


• 10+ years of experience in semiconductor architecture with significant experience in CPU, GPU, AI accelerator, or high-performance SoC development.


• Proven track record leading multiple complex SoCs from architecture through tapeout, silicon bring-up, and high-volume production.


• Deep understanding of CPU or GPU microarchitecture, cache coherency, memory systems, interconnects, performance modeling, and system optimization.


• Experience with modern compute architectures including ARM, x86, or RISC-V is highly desirable.


• Experience designing silicon for AI/ML accelerators, HPC, graphics, or datacenter compute platforms is strongly preferred.