VLSI Design Verification Intern

Hewlett Packard Enterprise Development LP

Fort Collins (CO)

Hybrid

USD 48,000 - 56,000

Part time

4 days ago
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Benefits offered by this job

Health & Wellbeing
Career Development
Inclusive culture

Job summary

Hewlett Packard Enterprise invites students to join as a VLSI Design Verification Intern in Colorado, a hybrid role requiring about two days per week in an office. You will collaborate with ASIC designers and architects on a future Slingshot-based project, applying SystemVerilog, UVM, and scripting to improve verification and debugging workflows.

Ideal candidates are pursuing a degree in EE/CE/CS with coursework in digital design and computer architecture, and experience in object-oriented

Qualifications

  • Pursuing a bachelor’s or master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field
  • Coursework in digital design and computer architecture
  • Experience with object-oriented programming
  • Strong analytical and problem-solving skills
  • Clear written and verbal communication skills
  • Willingness to ask questions, explain your reasoning, and participate in technical discussions

Responsibilities

  • Develop SystemVerilog and UVM testbench components, including models, monitors, scoreboards, and checkers
  • Write constrained-random tests
  • Develop and analyze functional coverage to identify verification gaps
  • Debug regression failures and help identify, log, and resolve logic bugs
  • Work directly with ASIC designers and architects
  • Use scripting, automation, and AI-assisted tools to improve the verification process

Skills

Object-oriented programming
SystemVerilog
Python
Verilog
Linux
AI tooling familiarity

Education

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or Computer Science

Tools

Verilog
SystemVerilog
VHDL
Python
Perl
Tcl

Job description

Company Overview

Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world. Our culture thrives on finding new and better ways to accelerate what’s next. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you. Open up opportunities with HPE.

Job Position

VLSI Design Verification Intern. This role has been designed as 'Hybrid' with a requirement that you will work on average 2 days per week from an HPE office.

Job Description

Our team develops HPE Slingshot, an industry-leading interconnect used in some of the world’s largest HPC and AI systems. As an intern, you’ll work alongside experienced architects, logic designers, and verification engineers on a switch or NIC ASIC verification project for a future generation of Slingshot. You’ll learn industry-standard SystemVerilog and UVM verification techniques, participate in technical design and debug discussions, and see how our team is applying emerging agentic AI workflows to solve complex engineering problems. We are looking for students interested in careers in design verification, HPC and AI systems, or high-performance interconnects.

Ideal candidates will have ASIC or VLSI experience through university coursework, industry experience, or self-study. Experience with agentic AI coding tools and workflows is preferred but not required.

Responsibilities
  • Develop SystemVerilog and UVM testbench components, including models, monitors, scoreboards, and checkers
  • Write constrained-random tests
  • Develop and analyze functional coverage to identify verification gaps
  • Debug regression failures and help identify, log, and resolve logic bugs
  • Work directly with ASIC designers and architects
  • Use scripting, automation, and AI-assisted tools to improve the verification process
Requirements
  • Pursuing a bachelor’s or master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field
  • Coursework in digital design and computer architecture
  • Experience with object-oriented programming
  • Strong analytical and problem-solving skills
  • Clear written and verbal communication skills
  • Willingness to ask questions, explain your reasoning, and participate in technical discussions
Preferred Skills
  • Experience with a hardware description language such as Verilog, SystemVerilog, or VHDL
  • Experience with Python, Perl, Tcl, or another scripting language
  • Experience working in Linux development environments
  • Academic, research, or personal projects involving digital hardware
  • Experience working as part of a distributed team
Accessibility

HPE is committed to creating an inclusive and accessible workplace and encourages applications from all qualified individuals, including those with disabilities. If you believe you require accommodation during any stage of the application or interview process, please submit your request by completing our secure form linked here. Note: This option is reserved for applicants needing assistance/reasonable accommodation related to a disability.

Equal Employment Opportunity

HPE is an Equal Employment Opportunity/ Veterans/Disabled/LGBT employer. We do not discriminate on the basis of race, gender, or any other protected category, and all decisions we make are made on the basis of qualifications, merit, and business need. Our goal is to be one global team that is representative of our customers, in an inclusive environment where we can continue to innovate and grow together.

Equal Opportunity Employer (EEO)

HPE provides equal employment opportunity to any employee or applicant without regard to sex, gender, color, race, ethnicity, religion, creed, national origin, ancestry, citizenship, age, marital status, sexual orientation, gender identity and expression, physical or mental disability, medical condition, pregnancy, protected veteran status, uniformed service status, familial status, genetic information, political affiliation, or any other characteristic protected by federal, state, or local law. If you’d like more information about your EEO right as an applicant under the law, please click here: Know Your Rights.

E-Verify

HPE is an E-Verify employer. E-Verify is an Internet-based system that compares information from an employee's Form I‑9, Employment Eligibility Verification, to data from U.S. Department of Homeland Security and Social Security Administration records to confirm the employment eligibility of all newly hired employees. For more information click here.

Benefits and Compensation
  • Hourly Salary USD 35.00 - 41.00 in Colorado (Base salary; Variable incentives may also be offered)
  • Health & Wellbeing We strive to provide our team members and their loved ones with a comprehensive suite of benefits that supports their physical, financial and emotional wellbeing.
  • Personal & Professional Development We also invest in your career because the better you are, the better we all are. We have specific programs catered to helping you reach any career goals you have — whether you want to become a knowledge expert in your field or apply your skills to another division.
  • Unconditional Inclusion We are unconditionally inclusive in the way we work and celebrate individual uniqueness. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good.
  • Let’s Stay Connected: Follow @HPECareers on Instagram to see the latest on people, culture and tech at HPE.
  • Information about employee benefits offered in the US can be found at https://myhperewards.com/main/new-hire-enrollment.html

Job: Administration

Job Level: N/A

The estimated job application period closure is May 25 2027; this timeline is provided for transparency and internal planning purposes.

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