VLSI Failure Analysis TPM - Lead Cross-Functional FA

Wipro Technologies

Santa Clarita (CA)

On-site

USD 60,000 - 140,000

Full time

43 hours ago
Be an early applicant
Application generator

A complete application in a minute — tailored resume and cover letter, ready to send.

Get past ATS filters

Job summary

Wipro Limited is seeking a Technical Project Manager (TPM) for Failure Analysis within the SQE organization. The TPM will serve as the central coordinator among internal engineering teams, SQE, SiFA, customers, and external FA laboratories to drive investigations and deliverables.

The role requires 3+ years in related PM or QA roles in semiconductor or hardware environments, with strong planning, tracking, and communication skills.

Qualifications

  • 3+ years of experience in Technical Project Management, Program Management, Supplier Quality, Product Engineering, Failure Analysis, or related technical functions.
  • Experience working within semiconductor, hardware, electronics manufacturing, validation, or quality engineering environments.
  • Strong project planning, execution tracking, documentation, and stakeholder management skills.

Responsibilities

  • Own end-to-end Failure Analysis intake, prioritization, tracking, and reporting activities.
  • Coordinate FA investigations across SQE, Engineering, Test, SiFA, customers, and external laboratories.
  • Manage sample logistics including receipt, tracking, dispatch, chain-of-custody, and third-party lab engagement.
  • Develop and maintain schedules, dashboards, status reports, and action-item trackers to ensure execution visibility.
  • Drive stakeholder communication, issue escalation, and closure of FA deliverables.
  • Improve operational processes, reporting mechanisms, and workflow efficiency across the FA ecosystem.

Skills

VLSI
Board Design

Education

Bachelor's degree in Electrical Engineering or related

Tools

Jira

Job description

Wipro Limited is seeking a Technical Project Manager (TPM) for Failure Analysis within the SQE organization. The TPM will serve as the central coordinator among internal engineering teams, SQE, SiFA, customers, and external FA laboratories to drive investigations and deliverables.

The role requires 3+ years in related PM or QA roles in semiconductor or hardware environments, with strong planning, tracking, and communication skills.

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

VLSI ENGINEER L3
VLSI ENGINEER L3

Wipro Technologies • Santa Clarita (CA)

On-site
USD 60,000 - 140,000
VLSI Failure Analysis Lab Specialist
VLSI Failure Analysis Lab Specialist

Wipro Technologies • Santa Clara (CA)

On-site
USD 45,000 - 100,000
Semiconductor Test TPM — Lead Cross‑Functional Programs
Semiconductor Test TPM — Lead Cross‑Functional Programs

Sandisk • Milpitas (CA)

On-site
USD 130,000 - 160,000
Paid vacation
Medical/dental/vision insurance
401(k) plan
Senior TPM - VLSI/ASIC Tape-out Lead (Equity)
Senior TPM - VLSI/ASIC Tape-out Lead (Equity)

NVIDIA Corporation • Santa Clara (CA)

Hybrid
USD 168,000 - 322,000
Equity availability
Benefits
SLT Hardware Engineer – VLSI Testing & Board Design
SLT Hardware Engineer – VLSI Testing & Board Design

Wipro Technologies • Santa Clara (CA)

On-site
USD 45,000 - 100,000
Medical and dental benefits
Disability insurance
Paid time off
SLT Hardware Technician: VLSI Test & Validation
SLT Hardware Technician: VLSI Test & Validation

Wipro • Santa Clara (UT)

On-site
USD 45,000 - 100,000
Medical benefits
Dental benefits
Disability insurance
+1
VLSI ENGINEER L2
VLSI ENGINEER L2

Wipro Technologies • Santa Clara (CA)

On-site
USD 45,000 - 100,000
Senior Silicon TPM: Lead Chip Development & Delivery
Senior Silicon TPM: Lead Chip Development & Delivery

Meta • Sunnyvale (CA)

On-site
USD 168,000 - 234,000
Equity
Bonus
Benefits
Silicon Failure Analysis & Validation Engineer
Silicon Failure Analysis & Validation Engineer

TPI Global Solutions • Austin (TX)

On-site
USD 90,000 - 130,000
Senior Failure Analysis Engineer – Semiconductor FA
Senior Failure Analysis Engineer – Semiconductor FA

ADP, Inc. • Santa Clara (CA)

On-site
USD 125,000 - 172,000
401k plan
Equity grants
Parental leave
+1