Ultra-Low Power CMOS Device Engineering Intern

GLOBALFOUNDRIES U.S. INC.; Town of Malta (NY); On-site; USD 28,000 - 55,000; Full time

Job summary

GlobalFoundries is seeking an internship in device engineering within its ULP CMOS technology development group. The role covers design, execution, and analysis of experiments for leading-edge silicon transistor technologies, including test chip design and device characterization, with collaboration across technology teams to meet roadmap goals.

Ideal candidates are sophomores pursuing EE/Materials Science/Solid State Physics, maintain a 3.0 GPA, and demonstrate strong English communication

Qualifications

• Sophomore year at time of application; pursuing a Bachelor’s in Electrical Engineering, Materials Science, Solid State Physics or related field.
• GPA of at least 3.0 and in good academic standing.
• English language proficiency (written & verbal).
• Availability to work at least 40 hours per week during the internship.

Responsibilities

• Device test chip layout design.
• Inline and bench electric test submission and analysis.
• Device analysis automation with standardization and efficiency improvement.

Skills

English fluency

Education

Bachelor’s in Electrical Engineering or related field

Job description

GlobalFoundries is seeking an internship in device engineering within its ULP CMOS technology development group. The role covers design, execution, and analysis of experiments for leading-edge silicon transistor technologies, including test chip design and device characterization, with collaboration across technology teams to meet roadmap goals.

Ideal candidates are sophomores pursuing EE/Materials Science/Solid State Physics, maintain a 3.0 GPA, and demonstrate strong English communication