Device Engineering Intern, ULP CMOS (Fall 2026)

GlobalFoundries inc.; Town of Malta, Northern (NY, KY); On-site; USD 28,000 - 55,000; Full time

Job summary

GlobalFoundries in Malta, NY invites you to join our ULP CMOS technology development internship. You will participate in device engineering activities focused on ultra-low power CMOS products, contributing to design, execution and analysis of experiments to advance transistor technologies and meet product requirements.

You will collaborate with cross-functional teams, perform chip layout and testing, and help monitor cost, variability and reliability to ensure manufacturability and

Qualifications

• Education – Sophomore or higher pursuing a Bachelor’s in Electrical Engineering, Materials Science, Solid State Physics or related field.
• Minimum 3.0 GPA and good academic standing.
• Fluency in English (written and verbal).
• Willingness to work 40 hours per week during the internship.

Responsibilities

• Device test chip layout design.
• Inline and bench electric test submission and analysis.
• Device analysis automation with standardization and efficiency improvement.

Skills

Device test chip design

Bench electrical testing

Device analysis automation

Strong written and verbal comms

Education

Bachelor’s in Electrical Engineering or related field

Tools

CMOS Fabrication Process

Electronic measurement equipment

Job description

## Device Engineering Intern, ULP CMOS (Fall 2026)Apply: USA - New York - Malta: Full time: Posted Today: JR-2502830**About GlobalFoundries**GlobalFoundries (GF) is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GF makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com.**Internship Program Overview:**Our Interns & Co-ops are our entry-level talent pipeline for GF across the globe. Our goal is to provide students with a meaningful work experience that will equip them with the skills to embark on a career in the fast-paced and growing semiconductor industry after graduation. As an intern at GF, you’ll experience one-on-one mentorship, work assignments that prioritize your growth and potential, professional development opportunities, and the chance to network with executives.**Summary of Role:**Main responsibility is device engineering in technology development organization focusing on ULP(Ultra Low Power) CMOS product line such as SMD(smart model device), Automotive, IoT(Internet of Thing), A&D(Aerospace and Defense), etc. The role includes design, execution, and analysis of experiments aimed at the creation and optimization of leading-edge silicon transistor technologies to meet the product requirements. It also includes test chip design, device characterization as well as extensive interaction with other technology development teams. In addition to the achievement of industry-leading device characteristics, cost, variability, and reliability must be monitored and controlled to ensure manufacturability and competitiveness. Interaction with end market and product line management groups is also a facet of this position to define technology requirements and parametric goals for GLOBALFOUNDRIES technology roadmaps.**Essential Responsibilities include:*** Device test chip layout design* Inline and bench electric test submission and analysis* Device analysis automation with standardization and efficiency improvement**Other Responsibilities:*** Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.**Required Qualifications:*** Education – At least a sophomore at time of application and actively pursuing a Bachelor’s in Electrical Engineering, Materials Science, Solid State Physics or related field through an accredited degree program during the time of internship.* Must have at least an overall 3.0 GPA and be in good academic standing.* Language Fluency - English (Written & Verbal)* Ability to work at least 40 hours per week during the internship.**Preferred Qualifications:*** Prior related internship or co-op experience* Demonstrated prior leadership experience in the workplace, school projects, competitions, etc.* Project management skills, i.e., the ability to innovate and execute on solutions that matter; the ability to navigate ambiguity.* Strong written and verbal communication skills* Strong planning & organizational skills* Knowledge of CMOS Fabrication Process* Understanding of solid state device physics, submicron FET architectures, and the implications of device characteristics #InternshipProgramUS**Expected Salary Range**$20.00 - $40.00**Expected Salary Range**$0.00 - $0.00The exact Salary will be determined based on qualifications, experience and location.If you need a reasonable accommodation for any part of the employment process, please contact us by email at [e-mail] and let us know the nature of your request and your contact information. Requests for accommodation will be considered on a case-by-case basis. Please note that only inquiries concerning a request for reasonable accommodation will be responded to from this email address.An offer with GlobalFoundries is conditioned upon the successful completion of pre-employment conditions, as applicable, and subject to applicable laws and regulations.GlobalFoundries is fully committed to equal opportunity in the workplace and believes that cultural diversity within the company enhances its business potential. GlobalFoundries goal of excellence in business necessitates the attraction and retention of highly qualified people. Artificial barriers and stereotypic biases detract from this objective and may be illegally discriminatory.All policies and processes which pertain to employees including recruitment, selection, training, utilization, promotion, compensation, benefits, extracurricular programs, and termination are created and implemented without regard to age, ethnicity, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, sexual orientation, gender identity or expression, veteran status, or any other characteristic or category specified by local, state or federal law