ULP CMOS Device Engineer Intern

GlobalFoundries; New York (NY); On-site; USD 28,000 - 55,000; Full time

Job summary

GlobalFoundries is seeking interns/co-ops for device engineering within the technology development organization, focusing on ULP CMOS products. You will engage in design, execution, and analysis of experiments to advance leading-edge silicon transistor technologies and ensure manufacturability and competitiveness.

The role involves collaboration with multiple teams, test chip work, and data-driven analysis, with mentorship and opportunities for professional development in a fast-paced

Qualifications

• Sophomore student at time of application.
• GPA of at least 3.0 and in good academic standing.
• English fluency (written & verbal).
• Ability to work at least 40 hours per week during internship.

Responsibilities

• Device test chip layout design.
• Inline and bench electric test submission and analysis.
• Device analysis automation with standardization and efficiency improvement.
• Adhere to safety and EHSS requirements and programs.

Skills

Strong written communication

Strong verbal communication

Project management

Leadership experience

Planning & organizational skills

Education

Sophomore status

Bachelor’s in Electrical Engineering, Materials Science, Solid State Physics

GPA 3.0 or higher

Tools

CMOS fabrication process

Job description

GlobalFoundries is seeking interns/co-ops for device engineering within the technology development organization, focusing on ULP CMOS products. You will engage in design, execution, and analysis of experiments to advance leading-edge silicon transistor technologies and ensure manufacturability and competitiveness.

The role involves collaboration with multiple teams, test chip work, and data-driven analysis, with mentorship and opportunities for professional development in a fast-paced