Technical Staff Engineer - Analog Design (Networking)

Microchip Technology Inc; Chandler (AZ); On-site; USD 120,000 - 160,000; Full time

Job summary

Microchip Technology Inc is seeking a highly skilled Staff Analog IC Design Engineer in Chandler, Arizona. This role involves designing integrated circuits for next-gen Ethernet and USB products, with a focus on creating and verifying analog/mixed-signal macros.

Ideal candidates must have a BSEE and at least 15 years of relevant experience, strong analytical and communication skills, and proficiency with tools like Cadence-Virtuoso.

This position involves collaboration in a dynamic environment and offers opportunities for continuous learning.

Qualifications

• Minimum of 15 years of industry experience in electronics/electrical engineering.
• Experience with high-speed interfaces like PCIe, Ethernet, and USB.
• Demonstrated design experience in analog SERDES sub-blocks (e.g., ADCs, DACs).
• Extensive experience with analog/mixed-signal IC design tools.

Responsibilities

• Define architecture for high-speed datacom Ethernet and USB SERDES.
• Design and verify analog/mixed-signal macros.
• Collaborate with layout engineers and document designs.
• Develop validation plans for post-silicon product level.

Skills

Analytical skills

Collaboration

Multi-tasking

Technical skills

Device physics knowledge

Low-power design expertise

High-speed design expertise

Education

BSEE

Tools

Cadence-Virtuoso

Simulation tools

Unix/Linux

Job description

Seeking a highly skilled Staff Analog IC Design Engineer to join our team and contribute to the specification, architecture, design, and development of integrated circuits— from initial concept through production quality— for next‑gen Ethernet and USB products. This role involves designing and architecting in‑silicon macros for high‑speed datacom SERDES. The position is part of Microchip Technology Inc.’s NCS (Networking and Connectivity Solutions) group, which develops Ethernet and USB solutions.

Requirements / Qualifications

To perform this role successfully, an individual must possess strong verbal and written communication skills, actively participate in group discussions, provide project updates, and generate both functional and technical documentation. A proactive mindset and the ability to learn and adapt quickly in a dynamic, cross‑functional environment are essential. Reasonable accommodation may be made to enable individuals with disabilities to perform the essential functions.

Essential Duties & Responsibilities

• Define and drive architecture definition for high‑speed datacom Ethernet and USB SERDES.
• Translate system requirements into block‑level specification and microarchitectures, enabling efficient partitioning and design ownership.
• Design and verify analog/mixed‑signal macros for high‑speed datacom Ethernet and USB SERDES, including ADCs, DACs, PLLs, transmitters, receivers, LDOs, regulators, high‑speed I/Os, bandgap, POR, oscillator, charge pump, under/over voltage protection, DC‑DC switching converters, analog switches, etc.
• Perform system and transistor‑level design and verification using mixed‑mode simulation across multiple scenarios, process corners, and mismatch conditions.
• Develop schematics and run simulations using modern CAD tools (Cadence‑Virtuoso).
• Collaborate closely with layout engineers to review, mitigate, and optimize parasitic and proximity effects.
• Generate block‑level and top‑level analog/mixed‑signal design specifications.
• Develop behavioral models for analog and mixed‑signal blocks.
• Document designs and lead formal design reviews.
• Collaborate with cross‑functional designers on interface specifications and implementation details.
• Define validation plans for post‑silicon product‑level ATE and lab validation.
• Interface with and support applications, product and test engineering, marketing, systems development, technology development, CAD, layout, and other design organizations.

Knowledge and Skills

• Strong analytical skills for complex system evaluation using both hand analysis and simulation tools.
• Ability to collaborate effectively with cross‑functional teams.
• Capability to manage multiple complex IC design tasks in a dynamic environment.
• Ability to meet aggressive timelines with minimal supervision.
• Excellent technical, communication, and interpersonal skills.
• Knowledge of Verilog, Liberty timing models, and IBIS‑AMI models is a plus.
• Strong understanding of device physics and operation.
• Strong expertise in low‑power and high‑speed design techniques.

Education and/or Work Experience

• BSEE and minimum of 15 years of industry experience in electronics/electrical engineering.
• Experience architecting high‑speed interfaces such as PCIe, Ethernet, and USB is highly desired.
• Demonstrated design experience in multiple analog SERDES sub‑blocks, including ADCs, DACs, PLLs, transmitters, receivers, LDOs, regulators, high‑speed I/Os, bandgap, POR, oscillator, charge pump, under/over voltage protection, DC‑DC switching converters, analog switches, etc.
• Extensive experience with Cadence and other analog/mixed‑signal IC design tools.
• Hands‑on lab validation experience using power supplies, source meters, oscilloscopes, signal generators, and other related equipment.
• Experience working in globally distributed design teams.
• Familiarity with DRC/LVS/ERC/PEX/EM analysis tools.
• Experience verifying designs for SOA as well as aging and SHE effects.
• Proficiency in Cadence Virtuoso IC design environment.
• Experience in Unix/Linux operating systems.
• Experience developing and executing scripts (Scheme, SKILL, Perl/Tcl, etc.).
• Strong team player with a positive attitude and a commitment to continuous learning.

Travel Time: 0% – 25%

Physical Attributes: Hearing, Seeing, Talking, Works Alone, Works Around Others

Physical Requirements: 80% sitting, 10% standing, 10% walking, 100% inside

Microchip Technology Inc. is an equal opportunity / affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected veteran status, age, or any other characteristic protected by law.