Tech Lead & Senior Software Engineer (C++, FPGA/ASIC)

Teradyne; San Jose (CA); On-site; USD 177,900 - 284,700; Full time

Benefits offered by this job

Medical insurance

Dental insurance

Vision insurance

Paid vacation and holidays

Tuition assistance

Job summary

Teradyne is seeking a Senior Software Engineer - Tech Lead to work in San Jose. The role involves understanding customer requirements, collaborating on software design and development, and engaging with hardware to ensure product alignment.

The ideal candidate will have 8+ years’ experience, expertise in C++, and insights into software development for embedded systems. Teradyne offers competitive compensation and a robust benefits package.

Qualifications

• 8+ years of experience in software engineering.
• Expert knowledge of C++ required.
• Experience as a Tech Lead.

Responsibilities

• Understand customer requirements and incorporate them into the software architecture.
• Collaborate to design and develop programs for new products.
• Work with QA teams to devise effective test strategies.

Skills

C++

Object Oriented Design

Software Development for Embedded Systems

Windows OS Internals

GIT

Education

Computer Science degree

Tools

Visual Studio

FPGAs

Microcontrollers

Job description

Teradyne is seeking a Senior Software Engineer - Tech Lead to work in San Jose. The role involves understanding customer requirements, collaborating on software design and development, and engaging with hardware to ensure product alignment.

The ideal candidate will have 8+ years’ experience, expertise in C++, and insights into software development for embedded systems. Teradyne offers competitive compensation and a robust benefits package.