System Validation Lead (Senior Staff/Principal)

Achronix Semiconductor Corporation; Santa Clara (CA); On-site; USD 130,000 - 160,000; Full time

Job summary

Achronix Semiconductor Corporation located in Santa Clara, California, is seeking a System Validation Lead to oversee PCB bring-up and functional validation of FPGAs. The ideal candidate will have 12+ years of experience and will be responsible for lab management, debugging, and developing testing strategies.

This full-time position requires hands-on lab work and collaboration with cross-functional teams. Strong problem-solving skills and expertise in electrical protocols are essential. A supportive and dynamic work environment awaits the right candidate.

Qualifications

• 12+ years of experience in lab validation and characterization.
• Expertise in lab environments and hands-on debugging.
• Strong communication and teamwork skills.

Responsibilities

• Lead PCB bring-up and functional validation for FPGAs.
• Manage lab equipment and inventory.
• Develop FPGA-based test cases and run tests.

Skills

Lab measurements

System-level debug

PCIe/DDR/Ethernet/GDDR6 protocols

Problem-solving skills

Scripting language (Python)

Education

BS/MS in Electrical Engineering

Tools

Oscilloscopes

Protocol Analyzer

Job description

System Validation Lead (Senior Staff/Principal)

Achronix Semiconductor Corporation is a fabless semiconductor corporation based in Santa Clara, California, offering high-performance FPGA solutions. Achronix is the only supplier to have both high-performance and high-density standalone FPGAs and embedded FPGA (eFPGA) solutions in high-volume production. Achronix's FPGA and eFPGA IP offerings are further enhanced by ready-to-use PCIe accelerator cards targeting AI, ML, networking and data center applications. All of Achronix's products are supported by best-in-class EDA software tools.

Achronix is looking for a dynamic engineer focused on PCB bring up, functional validation, measurements of PCBs, and lab management. These PCBs are used for AI inference applications and are integrated into Achronix data centers. The candidate will be defining and running system level tests on these PCBs and help to improve PCB coverage and yield. The candidate will collaborate with internal teams and IP partners to devise test plans for validation to ensure that Achronix FPGAs conform to the product datasheet specifications. The individual will also manage the Achronix lab facility. If you are a systems-level thinker who loves working on cutting-edge hardware and systems, this is your next big move.

Job Description/Responsibilities

This is an exciting position that will provide the opportunity to lead PCB bring up, functional validation, lab management and measurements of reference and validation PCBs for Achronix state-of-the-art FPGAs. The employee will join the Hardware Engineering group in Santa Clara and should be self-driven, constantly looking to set the bar higher, and a driver of excellence. Remote work is not possible for this job and availability in the office is expected on all five days of the week.

• Debug of system functionality issues in the lab.
• Lab measurements for functional and electrical debug of system.
• PCB bring-up for hardware validation.
• Developing FPGA-based design test cases, programming it onto the FPGA, running tests on silicon, and checking for vital parameters.
• Lab management including acquiring and setting up lab equipment, maintaining lab inventory, lab equipment allocation, etc.
• Setting up testing infrastructure for different functional and electrical tests in the lab and keeping the infrastructure up to date.
• Run system validation tests on customer-facing cards, including DPU accelerator cards, on different systems, and ensuring PCB robustness for different test cases.
• Providing feedback to the design team on electrical and functional issues.
• Proposing testing strategies and hardware infrastructure for system validation.
• Running Ethernet and PCIe electrical and functional compliance tests, and able to debug issues.
• Debug complex system-level issues spanning different interfaces and provide robust system solutions for them.
• Automating system validation flows to reduce run time and efficiently postprocess results.
• Partner with cross-functional teams, including ASIC, Firmware, and Validation, to ensure seamless product validation.

Required Skills

• Fully hands-on in a lab environment.
• Expertise in lab measurements and system-level debug.
• Experience with electrical test and characterization of silicon test chips in a lab.
• Experience working with PCIe/DDR/Ethernet/GDDR6 protocols.
• Thorough knowledge of oscilloscopes, BERT, TDR, protocol analyzer and other lab equipment.
• Understanding the chip, package, and PCB design, and creating test plans for system validation accordingly.
• Experience reviewing PCB schematics and layout of high-speed interfaces.
• Strong problem-solving skills.
• Ability to create solutions around high-level requirements.
• Thrives in a dynamic and fast-paced environment, with a pro-active mindset.
• Works well with other team members and has a collaborative approach.
• Comfortable programming in a scripting language (e.g., Python) and writing complete programs from scratch (e.g., 5000+ lines of code).
• Comfortable designing/maintaining flows and methodologies from scratch.
• Knowledge of SI/PI preferred.
• Ability to break a complex problem into simpler problems and to localize and resolve problems.
• Well organized, punctual, and excellent communication skills.

Education and Experience

• BS/MS in electrical engineering with 12+ years of experience in lab validation, characterization and measurements

Job Title: System Validation Lead (Senior Staff/Principal)

Requisition No: 6600-1006

Type of Position: Full Time

Reports To: