Staff SoC Layout/EDA Designer

Skyworks Solutions, Inc.; Fort Lauderdale (FL); On-site; USD 109,000 - 227,000; Full time

Benefits offered by this job

Healthcare benefits

401(k) plan with company match

Employee stock purchase plan

Paid time off

Job summary

Skyworks Solutions, Inc. is seeking a Staff SoC Layout/EDA Designer in the United States. The role focuses on creating and optimizing layouts for complex blocks and chip-level macros, collaborating with analog/RF and digital teams.

You will drive automation of layout workflows, produce high-quality macros, and manage tape-out processes while mentoring junior designers and coordinating with global teams to meet specifications and schedules.

Qualifications

• Minimum of a Bachelor's degree in Electronic Engineering or related field.
• 8+ years of relevant industry work experience.
• Proficient with Cadence Virtuoso, PDK layouts, and physical verification flows.

Responsibilities

• Collaborate with analog/RF/mixed-signal and digital engineers to create and optimize layouts for complex blocks and SoC macros.
• Automate and customize layout workflows through scripting and batch operations.
• Produce high-quality analog/RF/mixed-signal macros and perform layout verification.
• Own block-level layout designs and top-level floor planning with full hierarchical verification.
• Lead layout design flows, document processes, and manage tape-out activities.
• Support layout contractors and mentor junior designers.
• Coordinate with global engineers to ensure timing and specification compliance.

Skills

Cadence Virtuoso

PDK layout tools

Pegasus/Calibre

DRC/LVS/ERC/PERC/LVL

Analog/RF/mixed-signal layout

CMOS 40nm or lower

LDE/ANT/ESD/LUP/NTN/TW/SOI concepts

Digital physical design (VHDL/Verilog/

LEF/DEF

Scripting (Linux shell, Makefile, TCL,

Python/AI-LLM clients

Education

Bachelor's degree in Electronic Engineering or related field

Job description

Job Title: Staff SoC Layout/EDA Designer

Posting Start Date: 10/27/26

If you are looking for a challenging and exciting career in the world of technology, then look no further. Skyworks is an innovator of high-performance analog semiconductors whose solutions are powering the wireless networking revolution.Through our broad technology expertise and one of the most extensive product portfolios in the industry, we are Connecting Everyone and Everything, All the Time.

At Skyworks, you will find a fast-paced environment with a strong focus on global collaboration, minimal layers of management, and the freedom to make meaningful contributions in a setting that encourages creative thinking. We are excited about the opportunity to work with you and glad you want to be part of a team of talented individuals who together are changing the way the world communicates.

Requisition ID:78902

Job Description:

Description

Responsibilities

• Work with analog/RF/mixed-signal design engineers and digital engineers to create/optimize layouts of complex blocks and chip-level SoC macros

• Work on continuous-improvement projects to automate/customize layout work flows through scripting and batch-mode operations

• Producehigh qualityanalog/RF/mixed-signal macros using industry best practices for layout and physical verification

• Own block-levellayout designsand top-level floor planning includingfull hierarchicalverification/debug

• Lead, document, and communicate layout design flows and reviews efficientlyincludingthetape-out processandprojectdatabase management/archive

• Help manage/support layout contractors and mentor junior layout designers

• Collaborate withglobalteam engineers/designers to ensure designs are specification compliant and on time

• Work independently on complex tasks while stayingin syncwith team activities/plan

Required Experience and Skills

• Minimum of Bachelor's degree in Electronic Engineering or related field

• 8+ years relevant industry work experience required

• Strong working skills with Cadence Virtuoso and PDK layout design tools (OA, CDL, GDS).

• Strong working skills with physical verification tools (Pegasus/Calibre) and flows (DRC, LVS, ERC, PERC, LVL)

• Detailed experience with analog/RF/mixed-signal layout in deep sub-micron, CMOS nodes (40nm and lower)

Desired Experience and Skills

• Understanding of LDE,ANT,ESD/LUP,NTN/TW/SOI isolation, matching,PnR parasitics,and EMIR concepts

• Knowledge of digital physical design flows and techniques (VHDL, Verilog, LEF, DEF)

• Knowledge of scripting with Linux shell, Makefile, Modules, SKILL, TCL, Python and/or AI-LLM clients

The typical base pay range for this role across the U.S. is currently USD$108,700 -$226,800 per year. Starting base pay will depend on relevant experience and skills, training and education, business needs, market demands, the ultimate job duties and requirements, and work location. Skyworks has different base pay ranges for different work locations in the U.S. Benefits include access to healthcare benefits (including a premium-free medical plan option), a 401(k) plan and company match, an employee stock purchase plan, paid time off (including vacation, sick/wellness, parental leave), among others. Employees are eligible to participate in an incentive plan, and certain roles are also eligible for additional awards, including recognition and stock. These incentives and awards are based on individual and/or company performance.

Skyworks is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, age, sex, sexual orientation, gender identity, national origin, disability, protected veteran status, or any other characteristic protected by law.Skyworks strives to create an accessible workplace; if you need an accommodation due to a disability, please contact us at [e-mail].