Staff Engineer - Power Management IC Design

Socket.dev; Santa Clara (CA); On-site; USD 153,000 - 230,000; Full time

Job summary

Qualcomm Technologies, Inc. in Santa Clara, CA, is seeking an experienced IC Design Lead for PMIC development.

You will define architectures, oversee mixed-signal block design, verification, and documentation, and guide cross-functional teams through silicon bring-up and production ramp. Ideal candidates have 6+ years in analog/mixed-signal or PMIC design, with advanced degrees preferred, and hands-on experience with Cadence, SPICE, MATLAB, and Verilog/VHDL.

Qualifications

• Bachelor's degree in Electrical Engineering with 6+ years of analog, mixed-signal or PMIC design experience.
• Master's degree in Electrical Engineering or related field with 4+ years of relevant experience.
• PhD in Electrical Engineering or related field with 2+ years of relevant experience.
• 2+ years of academic and/or work experience using CADENCE, SPICE, MATLAB, and/or Verilog/VHDL.

Responsibilities

• Uses tools/applications (Cadence ADE, Spectre, MATLAB, etc.) to implement architecture and verify complex IC blocks.
• Owns design and verification strategy for PMIC blocks including controller circuitry and power stage interfaces.
• Guides layout engineers to generate high-quality layouts and performs verification of circuits.
• Runs advanced checks to ensure designs meet specs across PVT and operating conditions.
• Interprets simulation and silicon data, driving corrective actions as needed.
• Documents design intent, decisions, and silicon findings for PMIC subsystems.
• Collaborates with validation, test and product teams to support silicon bring-up and production ramp.
• Keeps aware of industry trends to inform future designs.
• Provides technical guidance and mentoring through design reviews.

Skills

Analog/Mixed-signal IC design

Power Management IC design

Controller ICs / high-current power

Education

Bachelor's degree in Electrical Engineering

Master's degree in Electrical Engineering

PhD in Electrical Engineering

Tools

Cadence

SPICE

MATLAB

Verilog/VHDL

Job description

Company:

Qualcomm Technologies, Inc.

Job Area:

Engineering Group, Engineering Group > PMIC Design

General Summary:

Oversees definition, design, verification, and documentation of mixed‑signal integrated circuits and products in the field of Power Management, with emphasis on controller ICs and integrated high‑current power stage circuitry for compute, data center, automotive, and industrial applications. Determines IC architecture and circuit‑level specifications based on defined product and platform requirements. Is actively involved in all aspects of the design flow, from architecture implementation and simulation through transistor‑level circuit design and verification. Heavy involvement in overseeing layout execution, silicon bring‑up, characterization, and debug is expected.

Preferred Qualifications

• 6+ years of experience in analog, mixed-signal or Power Management integrated circuit design experience with a Master's Degree or PhD in Electrical Engineering.
• Demonstrated experience in one or more of the following areas: Power Electronics, Control Theory, Multiphase Buck Controllers, High‑Accuracy Analog Front Ends, High‑Speed or High‑Drive Circuits, Very Low Power or Precision References, Electro‑Migration and Transistor Reliability, Behavioral Modeling, or Mixed‑Signal Verification Techniques

Principal Duties and Responsibilities

• Uses tools/applications (i.e., Cadence ADE, Spectre, MATLAB, etc.) to execute the architecture implementation, circuit design, and verification of complex IC blocks and subsystems according to design specifications and requirements.
• Owns the design and verification strategy for assigned blocks or subsystems within power management ICs, including controller circuitry and integrated high‑current power stage interfaces.
• Guides layout engineers independently to generate high‑quality layouts and conducts physical and reliability verification of circuits.
• Runs advanced functionality and performance checks to ensure designs meet specifications across PVT and operating conditions.
• Interprets simulation, silicon characterization, and debug results, driving corrective design actions where needed.
• Documents detailed design intent, architectural decisions, circuit functionality, and silicon findings for complex PMIC subsystems.
• Collaborates closely with validation, test, and product engineering teams to support silicon bring‑up, characterization, qualification, and production ramp.
• Maintains awareness of industry trends, competitor products, and advances in power management circuits; applies insights to ongoing and future designs.
• Provides technical guidance and informal mentoring to other engineers through design reviews and technical problem solving.

Level of Responsibility

• Works with high independence and minimal supervision on complex design problems.
• Makes decisions with moderate to high impact on product performance, schedule, and silicon success; errors may require cross‑functional involvement to resolve.
• Uses clear verbal and written communication to convey complex technical information to audiences with varying levels of expertise.
• Operates within prescribed project scope, schedule, and resource constraints.
• Completes tasks involving multiple interdependent steps, requiring planning, prioritization, and sound engineering judgment.
• Exercises creativity and technical judgment to generate original design solutions within established guidelines.
• Applies deductive and inductive problem‑solving techniques where information may be incomplete or ambiguous.
• May be consulted during strategic planning periods for technical input and feasibility assessment.

Minimum Qualifications

• Bachelor's degree in Electrical Engineering and 6+ years of analog, mixed-signal or Power Management integrated circuit design experience.
• Master's degree in Electrical Engineering or related field and 4+ years of analog, mixed-signal or Power Management integrated circuit design experience.
• PhD in Electrical Engineering or related field and 2+ years of analog, mixed-signal or Power Management integrated circuit design experience.
• 2+ years of academic and/or work experience using CADENCE, SPICE, MATLAB, and/or Verilog/VHDL.

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [e-mail] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Pay range and Other Compensation & Benefits:

$153,200.00 - $229,800.00

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.