Staff Engineer, FPGA Design (R5347)

Shield AI; Dallas (TX); On-site; USD 110,000 - 150,000; Full time

Job summary

PVH in Dallas, TX seeks a Senior FPGA Engineer to design, implement, verify, and optimize FPGA-based communication modules for UAV avionics. You will perform synthesis, timing closure, bitstream generation, and hardware bring-up while integrating with the broader system architecture and collaborating with hardware/firmware/software teams.

The role emphasizes latency and reliability optimization, design reviews, and thorough documentation.

Qualifications

• Experience designing FPGA-based communication modules.
• Knowledge of synthesis and timing closure.
• Experience with hardware bring-up and verification.
• Strong collaboration across hardware/firmware/software teams.

Responsibilities

• Design, implement, verify FPGA modules for UAV avionics.
• Perform synthesis, timing closure, and bitstream generation.
• Integrate FPGAs with system architecture and optimize latency/reliability.
• Participate in design reviews and maintain documentation.

Skills

FPGA design

Verilog

VHDL

Synthesis

Timing closure

System integration

Documentation

Tools

Vivado

Job description

Design, implement, verify, and debug FPGA-based communication modules for UAV avionics. Perform synthesis, timing closure, bitstream generation, and hardware bring-up. Integrate FPGAs with system architecture, optimize for latency/reliability, collaborate across hardware/firmware/software teams, participate in design reviews, and maintain documentation.

Your Match

How well this role fits your profile.

Confirmed H-1B sponsor. The Department of Labor record shows filings under SHIELD AI, INC. .

Filings 3

Approved 100%

Avg wage $130K

From public Department of Labor LCA disclosures. Sponsorship history is a signal about the employer, not a commitment on this role.