Staff Engineer Digital Functional Verification (f/m/div)

Infineon Technologies AG; Gorham Township (OH); On-site; USD 120,000 - 180,000; Full time

Job summary

Infineon Technologies AG is seeking a Staff Engineer Digital Functional Verification to lead the development of UVM-based verification environments and test scenarios using SystemVerilog. You will ensure efficient verification with constrained-random techniques and apply UPF-based low-power verification within a global, cross-functional team.

The role emphasizes collaboration across business units, leadership in verification methodology, and continuous improvement to deliver high-quality

Qualifications

• Degree in Electrical Engineering, Computer Science or similar.
• 5+ years in digital/mixed-signal verification and formal verification.
• Proficient in SystemVerilog and UVM.
• Knowledge of UPF/PA is a plus.

Responsibilities

• Develop UVM-based verification environments for ICs.
• Create test scenarios using SystemVerilog and constrained-random testing.
• Apply formal verification methods and drive know-how exchange.
• Define verification plans, tracking, and reporting at module level.
• Verify low-power aspects using UPF and manage verification activities across sites.

Skills

SystemVerilog/UVM

Formal Verification

Metric Driven Verification

English Fluency

Education

Electrical Engineering / Computer Science degree

Tools

Cadence verification software

UPF

Job description

Are you ready to be at the forefront of innovation and efficiency? As a Staff Engineer Digital Functional Verification, you will ensure the most efficient development of Infineon products with right quality, delivered with first time success. You will play a crucial role in Infineon's value creation chain, contributing directly to product development and focusing on efficient execution, maintenance, and continuous improvement.

Job Description

As a Staff Engineer Digital Functional Verification, you will develop UVM-based verification environments, implement test scenarios using System Verilog, and ensure low-power verification using UPF. By applying Formal Verification, driving knowledge exchange, and collaborating with global and cross-disciplinary teams, you will contribute to the development of innovative and high-quality products.

In your new role you will:

• Be in continuous and intensive contact with our development sites worldwide
• Support the experts from our business units in verification projects
• Contribute actively to the internal exchange of know-how and experience at Infineon
• Collaborate with other disciplines (e.g. Application Engineering) to define the verification methodology and the verification plan
• Design and develop the verification environment for ICs using the "Universal Verification Methodology" (UVM)
• Identify sub-modules that are particularly suitable for specific verification method (Simulation based / Formal Verification) and apply selected methodology
• Implement test scenarios using System Verilog and verify functionality using a Constrained Random Approach
• Define and control verification management activities on module level, such as verification planning, verification tracking and reporting
• Use the Unified Power Format (UPF) to verify the low-power aspects of our designs

Your Profile

You are a detail-oriented and solution-driven professional with strong problem-solving skills and a commitment to high-quality outcomes. With excellent communication abilities, you thrive in dynamic, cross-functional teams, fostering collaboration and driving continuous improvement.

You are best equipped for this task if you have:

• A degree in Electrical Engineering, Computer Science or a similar academic discipline
• At least 5 years of professional experience in Metric Driven Verification (digital & mixed signal) and Formal Verification
• Experience in the creation and dissemination of methods in functional verification (SystemVerilog)
• An excellent understanding of SystemVerilog/UVM along with strong practical skills in their application (PA/UPF as a plus)
• Experience in technical leadership and project management is a plus
• Knowledge of RTL design (SystemVerilog/VHDL)
• Experience with Ethernet Protocol (bridge, PHY, MACs…) is a plus
• Cadence verification software as a plus
• Knowledge of SVAs, PSL, Formal verification and mixed-signal verification (as a plus)
• Fluency in English

#WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in?

The central R&D organization “Design Enabling and Services” (DES) provides the design environments (design-systems) to the different product development teams at Infineon. With leading edge design methods, complex building blocks and a wide range of product development services DES enables Infineon's advanced IC development. This means the complete value creation chain from abstract system models down to the fully verified product layout which ensures high quality manufacturing readiness.

We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant´s experience and skills.

We look forward to receiving your resume, even if you do not entirely meet all the requirements of the job posting.