Staff Digital Design Engineer

Elevate Semiconductor; San Diego (CA); On-site; USD 140,000 - 160,000; Full time

Job summary

Elevate Semiconductor is seeking a Staff Digital Design Engineer to lead the design and verification of digital circuits for ATE ASICs in San Diego. You will be integral in defining functional requirements and ensuring successful integration of digital circuits, requiring strong expertise in SystemVerilog and extensive experience in digital design.

Benefits

Medical insurance

Vision insurance

401(k)

Tuition assistance

Paid maternity leave

Paid paternity leave

Qualifications

• Minimum of 6 years of experience in digital semiconductor circuit design.
• Proficiency with Cadence tool flow and system verification methodologies.
• Familiarity with UVM is a plus.

Responsibilities

• Define timing constraints and achieve finalized digital layouts.
• Analyze design requirements and develop digital circuits using SystemVerilog.
• Collaborate with the ASIC team to integrate digital functions.

Skills

SystemVerilog

Communication skills

Synthesis

Education

Bachelor's degree in Electrical Engineering

Tools

Cadence tool flow

Static timing analysis (STA) tools

Place-and-route (PnR) tools

Job description

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Elevate Semiconductor provided pay range

This range is provided by Elevate Semiconductor. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more.

Base pay range

$140,000.00/yr - $160,000.00/yr

At Elevate Semiconductor, our mission is to empower semiconductor and system test customers by delivering world-class test integrated circuits (ICs) that tackle the industry's most complex automated test equipment (ATE) challenges. We pride ourselves on exceeding expectations by designing the lowest power, highest density solutions to achieve the lowest possible cost of test—both today and for the future.

We are seeking a talented Senior Digital Design Engineer to play a critical role in the design and verification of digital circuits for ATE ASICs. In this position, you will collaborate closely with project leads to define functional requirements and work alongside our analog design team to seamlessly integrate digital circuits into devices.

Responsibilities include defining timing constraints, performing synthesis, floor planning, place and route (PnR), and timing analysis to achieve a finalized digital layout. Additionally, you’ll contribute to system verification by developing SystemVerilog or UVM testbenches and tests to validate device functionality. You may also support physical implementation to ensure an accurate and robust final design.

This role requires you to work onsite in San Diego, CA.

Responsibilities

As the sole Digital Design Engineer in the organization, you will own the entire digital design flow from concept to implementation. Your responsibilities will include:

• Analyze design requirements and contribute to defining the final digital circuit
• Develop digital circuits using SystemVerilog
• Create testbenches and tests to verify digital circuit functionality
• Collaborate with the ASIC team to integrate digital functions into the device
• Define timing constraints and ensure they are met throughout the design process
• Partner with the physical implementation team to achieve timing and area goals
• Utilize synthesis, place-and-route (PnR), and static timing analysis (STA) tools to optimize performance and layout

Requirements

• Bachelor’s degree in Electrical Engineering (required).
• Minimum of 6 years of experience in digital semiconductor circuit design.
• Proficiency with Cadence tool flow.
• Knowledge of verification methodologies.
• Expertise in SystemVerilog.
• Familiarity with synthesis, place-and-route (PnR), and static timing analysis (STA) tools.
• Excellent verbal and written communication skills.

Preferences

• Familiarity with UVM is a plus.
• Experience with scripting languages is advantageous.
• Hands-on experience with benchtop or ATE testing is preferred.

Seniority level

• Seniority level

  Mid-Senior level

Employment type

• Employment type

  Full-time

Job function

• Industries

  Semiconductor Manufacturing

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Inferred from the description for this job

Medical insurance

Vision insurance

401(k)

Tuition assistance

Paid maternity leave

Paid paternity leave

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