Staff Design Verification Engineer - Mixed-Signal ICs

Cirrus Logic; Austin (TX); On-site; USD 130,000 - 180,000; Full time

Job summary

Cirrus Logic, a leader in mixed-signal ICs, seeks an experienced Design Verification Engineer to join our silicon verification team in Austin, TX. You will drive end-to-end verification across block and chip levels, partnering with design, systems, firmware, and test teams to deliver robust, high‑quality products for leading consumer brands.

You will develop UVM‑based testbenches, perform coverage analysis, and contribute to pre‑ and post‑silicon validation.

Qualifications

• Bachelor’s with 7+ years of relevant experience.
• Master’s with 5+ years of relevant experience.
• PhD with 3+ years of relevant experience.
• Significant industry experience in silicon design and/or ASIC verification.
• Strong proficiency with HDLs: Verilog and/or VHDL.
• SystemVerilog with UVM (or OVM/AVM/Vera).
• Hands-on experience with testbench architecture and stimulus generation.

Responsibilities

• Develop comprehensive verification plans aligned with design and system requirements.
• Perform functional verification of custom mixed-signal ASICs at block and chip level.
• Design and implement UVM-based testbenches, including infrastructure, scoreboards, checkers, and assertions.
• Create directed and constrained-random test suites to ensure robust functional coverage.
• Implement, analyze, and drive functional and code coverage, including coverage closure.
• Conduct failure analysis, regression triage, and debug, resolving functional and timing-related issues.
• Run and debug gate-level simulations, including timing violations and back-annotation issues.
• Develop and maintain digital and mixed-signal behavioral models to support verification.
• Support verification flow and infrastructure development, including regressions and automation.
• Collaborate cross-functionally with digital/analog design, systems, applications, firmware/software, and manufacturing test teams.
• Contribute to both pre-silicon verification and post-silicon validation efforts.
• Proactively improve verification methodologies, processes, and best practices.

Skills

Verilog

VHDL

SystemVerilog

UVM

Digital design

Testbench development

Regression debugging

SVA

Education

Bachelor’s degree or equivalent

Master’s degree

PhD

Job description

Cirrus Logic, a leader in mixed-signal ICs, seeks an experienced Design Verification Engineer to join our silicon verification team in Austin, TX. You will drive end-to-end verification across block and chip levels, partnering with design, systems, firmware, and test teams to deliver robust, high‑quality products for leading consumer brands.

You will develop UVM‑based testbenches, perform coverage analysis, and contribute to pre‑ and post‑silicon validation.