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eInfochips, an Arrow company, is seeking an experienced timing engineer to develop and verify timing constraints for ASIC designs in a collaborative, cross-functional team. You will work with RTL, verification, synthesis, and DFT groups to resolve timing and implementation issues, ensuring timing closure across modes, including DFT.
Proficiency with STA tools and scripting is required. The role is fully on-site in San Jose, CA, and offers a comprehensive benefits package as part of Arrow's
Must be able to travel to an Arrow Client office location as requested by Arrow Client leadership.
Complete On-Site at San Jose, CA.
eInfochips, an Arrow company (Fortune #133), is a leading global provider of product engineering and semiconductor design services. A rich history of over two decades, with over 500+ products developed and 40M deployments in 140 countries, eInfochips continues to fuel technological innovations in multiple verticals. eInfochips has strategic technology partnerships with Qualcomm, NVIDIA, NXP, Analog Devices, Texas Instruments, Amazon, Microsoft and Google to name a few. Along with Arrow's $38B in revenues, 22,000 employees, and 345 locations serving over 80 countries, eInfochips is primed to accelerate connected products innovation for 150,000+ global clients. eInfochips acts as a catalyst to Arrow's Sensor-to-Sunset initiative and offers complete edge-to-cloud capabilities for its clients. Please visit www.einfochips.com for our portfolio of product engineering services across various industries & verticals.
Arrow is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, age, sexual orientation, gender identity, national origin, veteran or disability status. (Arrow EEO/AAP policy).