Sr. Technical Project Lead (Silicon Engineering)

United States Digital Space LLC

Austin (TX)

On-site

USD 100,000 - 130,000

Full time

14 days+

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Job summary

United States Digital Space LLC is hiring a SR. TECHNICAL PROJECT LEAD in Austin, Texas. You'll leverage your experience to lead complex silicon projects, ensuring seamless development for cutting-edge space technologies.

The role requires a Bachelor’s in Engineering and over 8 years of project management experience. Strong communication skills and knowledge of ASIC design processes are essential. Join a forward-thinking organization dedicated to pioneering technology for the future.

Qualifications

  • 8+ years of Technical Project or Program Management experience.
  • Experience in satellite and/or consumer products lifecycle management.
  • Knowledge of digital and/or analog/RF ASIC design processes.

Responsibilities

  • Drive complex silicon projects from kick-off to production.
  • Track schedules and milestones for ASIC development tasks.
  • Collaborate with engineering teams for silicon introductions.

Skills

Technical Project Management
Communication Skills
Silicon Design
Project Management Tools

Education

Bachelor’s degree in Engineering
Master’s degree in Engineering (preferred)

Tools

Jira
Smartsheet
Confluence

Job description

the company was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today the company is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.

SR. TECHNICAL PROJECT LEAD (SILICON ENGINEERING)

At the company we’re leveraging our experience in building rockets and spacecraft to deploy Starlink, the world’s most advanced broadband internet system. Starlink is the world’s largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system – thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We’ve only begun to scratch the surface of Starlink’s potential global impact and are looking for best-in-class engineers to help maximize Starlink’s utility for communities and businesses around the globe.

We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross‑disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting‑edge next‑generation ASICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting‑edge silicon solutions that will expand the performance and capabilities of the Starlink network.

RESPONSIBILITIES:
  • Leverage experience and technical background to drive complex and challenging silicon projects from kick‑off through production
  • Track and communicate schedules and milestones for front‑end and backend ASIC development tasks
  • Work with multidisciplinary teams to introduce new silicon to drive fast as possible bring‑up
  • Collaborate with silicon team and supply chain to find suppliers for silicon development
  • Lead discussions with internal and external teams to identify and rectify issues
BASIC QUALIFICATIONS:
  • Bachelor’s degree in an engineering discipline
  • 8+ years of Technical Project or Program Management experience
PREFERRED SKILLS AND EXPERIENCE:
  • Master’s degree in an engineering discipline
  • Project leadership of satellite and/or consumer product lifecycle(s)
  • Excellent communication skills both written and verbal to communicate with stakeholders across the company
  • Knowledge and experience with digital and/or analog/RF ASIC design processes from project kick‑off to tape‑out
  • Knowledge and hands on experience working with external IP and EDA tool vendors
  • Experience working with advance node fabs, package substrate and OSAT partners
  • In-depth understanding of the steps required to go from engineering wafers to mass production
  • Silicon project management skills with experience in most or all of the following areas:
    • Silicon design, bring‑up, qualification, and ramp‑up to production
    • Pre‑silicon testing with emulation or FPGA platform
    • Wafer and package part ATE testing
    • Silicon packaging
    • Silicon reliability and package qualification for mission profile
    • PCB schematics and layout
    • Silicon software drivers and diagnostic scripts
  • Ability to work in a dynamic environment with changing needs and requirements
  • Proficiency in project/program management tools such Jira, Smartsheet, confluence or equivalent tools
ADDITIONAL REQUIREMENTS:
  • Must be willing to travel when needed (typically <10%)
  • Ability to work extended hours and weekends as needed to meet critical deadlines
ITAR REQUIREMENTS:
  • To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.

the company is an Equal Opportunity Employer; employment with the company is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

Applicants wishing to view a copy of the company’s affirmative action plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should reach out to hr@unitedstatesdigital.space.

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