Sr Principal Apps Engineer - DRAM/DDR5 Validation (Hybrid)

Rambus; San Jose (CA); Hybrid; USD 158,000 - 293,000; Full time

Benefits offered by this job

Hybrid work model

Job summary

Rambus is seeking a Sr Principal Applications Engineer with DRAM and failure analysis expertise to analyze and debug complex issues in DRAM, memory interface chips, DIMMs, servers and BIOS interactions. You will support Rambus DDR4 and DDR5 customers internationally, collaborating with top engineers to develop high-performance memory solutions for data centers.

The role features a hybrid work model with onsite collaboration and international travel, offering a chance to influence product

Qualifications

• Familiar with DDR4/DDR5 DIMM memory operation in Intel, AMD, and/or OEM servers.
• Good understanding of signal integrity issues at clock rates of 3 GHz and above.
• Experience with power management and I2C/I3C serial interfaces.
• Extensive experience with probing, using high speed oscilloscopes and other lab equipment.
• History of using fundamental root cause techniques (fishbone, design of experiments, etc.) to solve complex problems.

Responsibilities

• Analyze and debug complex technical issues involving server memory and manage customer issues to a satisfactory conclusion.
• Support technical qualification of new chip designs to secure customer design wins.
• Assist with validation and debug of new memory interface chips for DDR5 servers.
• Collect and analyze signal integrity data at the system level.
• Conduct failure analysis and prepare failure analysis and 8D reports.
• Gather customer technical feedback and communicate to Marketing and Engineering teams.
• Present technical updates to customers and company management in writing and verbally via quality presentations.
• Prepare technical documentation such as datasheets, user guides and application notes.

Skills

DDR4/DDR5 memory operation

Signal integrity analysis

Root cause analysis

Oscilloscope probing

Scripting (Python/Perl/Tcl)

Customer interaction

English and Korean communication

Travel flexibility

Electrical engineering fundamentals

Education

Bachelor's degree in Electrical Engineering or related field

Tools

ATE tester

Server platform debug tools

MRC BIOS analysis

Job description

Rambus is seeking a Sr Principal Applications Engineer with DRAM and failure analysis expertise to analyze and debug complex issues in DRAM, memory interface chips, DIMMs, servers and BIOS interactions. You will support Rambus DDR4 and DDR5 customers internationally, collaborating with top engineers to develop high-performance memory solutions for data centers.

The role features a hybrid work model with onsite collaboration and international travel, offering a chance to influence product