Sr Principal Analog IC Design Engineer

Qorvo, Inc.

San Jose (CA)

On-site

USD 193,000 - 251,000

Full time

6 days ago
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Job summary

Qorvo, Inc. in San Jose, CA is seeking a Sr Principal Analog IC Design Engineer to lead the development of high‑performance power management ICs.

The role drives architecture, transistor‑level design, and validation, collaborating with cross‑functional global teams to deliver efficient, reliable products for mobile, IoT, and industrial markets. A strong background in DC‑DC converters and production release is required.

Qualifications

  • Bachelor's Degree in Electrical Engineering.
  • 15+ years of engineering experience in the semiconductor industry.
  • 8+ years of experience in analog and mixed-signal IC design with DC-DC converter architectures and control methods.
  • Ability to communicate highly technical concepts to both technical and non-technical stakeholders.
  • Experience with EDA tools such as EMIR and parasitic extraction tools/flows.
  • Experience with production releases of power management ICs.

Responsibilities

  • Lead the design and development of high-performance analog power management ICs, ensuring best-in-class efficiency, power density, and reliability.
  • Collaborate with system engineers to define product architecture and specifications, balancing performance, power, and cost requirements.
  • Select and implement optimal circuit topologies, ensuring robustness, yield, and manufacturability.
  • Conduct transistor-level design, simulation, and validation to meet functional and performance specifications.
  • Work closely with layout engineers to optimize floor planning, parasitics, and overall silicon performance.
  • Engage with global design teams to align on development strategies and execution plans.
  • Partner with test and characterization engineers to define validation methodologies and optimize production test strategies.
  • Drive technical reviews and documentation, presenting design decisions and trade-offs to internal stakeholders.

Skills

Analog IC design
Power management
DC-DC converter architectures
Transistor-level design
Cross-functional collaboration

Education

Bachelor's Degree in Electrical Engineering
Master's or PhD in Electrical Engineering

Tools

Cadence Virtuoso
Simplis
ADS
EMIR tools

Job description

Sr Principal Analog IC Design Engineer

Experience Level: Professional


Job Type: Regular


Location: San Jose, CA, US, 95134 Richardson, TX, US, 75081


Qorvo (Nasdaq: QRVO) supplies innovative semiconductor solutions that make a better world possible. We combine product and technology leadership, systems-level expertise and global manufacturing scale to quickly solve our customers' most complex technical challenges. Qorvo serves multiple high-growth segments of large global markets, including consumer electronics, smart home/IoT, automotive, EVs, battery-powered appliances, network infrastructure, healthcare and aerospace/defense. Visit www.qorvo.com to learn how our innovative team is helping connect, protect and power our planet.


Qorvo's fast-growing Power Management division is at the forefront of innovation in Power Loss Protection, PMICs, Motor Control, and Battery Management solutions, serving a diverse range of applications across Mobile, Consumer, IoT, and Industrial markets. We are seeking a highly skilled Analog Power Design Engineer to develop next-generation, high-performance power management solutions. In this role, you will drive architecture, design, and validation of industry-leading analog power ICs, collaborating closely with cross-functional global teams to deliver world-class products that set new benchmarks in efficiency, reliability, and performance.


Responsibilities:



  • Lead the design and development of high-performance analog power management ICs, ensuring best-in-class efficiency, power density, and reliability.

  • Collaborate with system engineers to define product architecture and specifications, balancing performance, power, and cost requirements.

  • Select and implement optimal circuit topologies, ensuring robustness, yield, and manufacturability.

  • Conduct transistor-level design, simulation, and validation to meet functional and performance specifications.

  • Work closely with layout engineers to optimize floor planning, parasitic, and overall silicon performance.

  • Engage with global design teams, including colleagues in Asia, to align on development strategies and execution plans.

  • Partner with test and characterization engineers to define validation methodologies, troubleshoot design issues, and optimize production test strategies.

  • Drive technical reviews and documentation, presenting design decisions, analysis, and trade-offs to internal stakeholders.


Required Qualifications:



  • A minimum of a Bachelor's Degree in Electrical Engineering

  • 15+ years of engineering experience (or an equivalent amount of education and expereince) working in the semiconductor industry

  • 8+ years of experience (or an equivalent amount of education and expereince) in analog and mixed-signal Integrated circuit (IC) design, with DC-DC power converter architectures and control methodologies such as voltage mode control and current mode control

  • Ability to communicate highly technical concepts effectively to both technical and non-technical stakeholders

  • Experience working in Electronic Design Automation (EDA) tools such as EMIR tools capacitive coupling tools and flows, parasitic extraction tools, floating nodes, etc.

  • Experience with production release of power management ICs


Preferred Qualifications:



  • Masters or PHD in Electrical Engineering

  • Experience with Cadence Virtuoso, Simplis, and ADS

  • Hands-on lab experience supporting high frequency switching power supplies in the semiconductor power management industry


Location: This role is available in our Richardson, TX and San Jose, CA locations.


Competitive base salary commensurate with experience: $193,100 - $251,100, relevant for the California Bay Area (subject to change dependent on physical location)


Posted salary ranges are made in good faith. Qorvo reserves the right to adjust ranges depending on the experience/qualification of the selected candidate as well as external competitiveness and internal comparability.


Base compensation is one element of Total Rewards offered at Qorvo. More information on the Total Rewards package can be shared upon request.


MAKE A DIFFERENCE AT QORVO


We are Qorvo. We do more than create innovative RF and Power solutions for the mobile, defense and infrastructure markets - we are a place to innovate and shape the future of wireless communications. It starts with our employees. As a unified global team, we bring a commitment to excellence, growth and a passion for creating what's next. Explore the possibilities with us.


We are an Equal Employment Opportunity (EEO) employer and welcome all qualified applicants. Applicants will receive fair and impartial consideration without regard to any characteristics protected by applicable law, including race, color, religion, sex (as defined by law), national origin, age, military or veteran status, genetic information, or disability.

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