Sr. Manager Validation Engineering

OSI Engineering

Atlanta (GA)

On-site

USD 170,000 - 210,000

Full time

14 days+

Get more replies from employers

Send a job-specific resume in minutes.

Benefits offered by this job

Medical insurance
Vision insurance
401(k)

Job summary

A leading chip and silicon IP provider is seeking an experienced Validation Manager to join its Memory Interface Chip business unit in Atlanta. The role involves managing a team, leading validation activities, and developing automation frameworks in Python. Candidates should have a background in semiconductor validation and experience with DDR4/DDR5 interfaces. This full-time position offers a competitive salary package and benefits including medical and vision insurance, and 401(k).

Qualifications

  • 5+ years of hands-on bench validation experience in semiconductor environments.
  • Proven experience with DDR4/DDR5 memory interfaces.
  • Demonstrated proficiency in Python scripting for validation.

Responsibilities

  • Lead bench validation and electrical characterization activities.
  • Manage and mentor a team of validation engineers.
  • Collaborate with cross-functional teams to deliver high-quality products.

Skills

Python coding skills
Bench validation
Signal integrity
Project management
Team leadership

Education

B.S. or M.S. in Electrical Engineering

Job description

Validation Manager – Memory Interface Chip

A leading chip and silicon IP provider is seeking an experienced Validation Manager to join its Memory Interface Chip business unit. In this role, you’ll collaborate with some of the industry’s top engineers and innovators to develop products that make data faster, more efficient, and more secure.

This is a hands‑on technical management role and requires approximately 20–30% day‑to‑day technical work alongside leadership responsibilities.

Base pay range

$170,000.00/yr – $210,000.00/yr

Location: Atlanta, GA; San Jose, CA; United States

Key Focus Areas & Technical Expertise

  • Bench validation and electrical characterization of high‑performance memory buffer chips
  • DDR4/DDR5 memory characterization and validation
  • Strong Python coding skills – must be capable of developing automation scripts and lab tools
  • Experience with SerDes or PCIe/PCIe PHY high‑speed interfaces
  • Solid understanding of signal integrity, power integrity, and high‑speed I/O characterization

Responsibilities

  • Lead and directly contribute to hands‑on bench validation and electrical characterization activities (20–30% of time)
  • Manage and mentor a small team of 2–5 validation engineers, ensuring technical excellence and project alignment
  • Partner with Design, Architecture, Verification, and Operations teams to deliver top‑quality buffer chip products
  • Develop and continuously refine validation methodologies, improving design coverage, efficiency, and time‑to‑market
  • Collaborate with internal and external partners for test equipment sourcing, PCB fabrication, and assembly
  • Develop automation frameworks and Python‑based validation scripts for data collection and analysis
  • Define and execute test methodologies to validate silicon designs against specifications
  • Contribute to project planning, budgeting, and resource allocation

Qualifications

  • B.S. or M.S. in Electrical Engineering or related field
  • 5+ years of hands‑on bench validation experience in semiconductor or system‑level environments
  • Proven experience with DDR4/DDR5 memory interfaces and processor/memory system architectures
  • Demonstrated proficiency in Python scripting for validation, automation, and data analysis
  • Background in SerDes or PCIe PHY characterization is highly desired
  • Strong understanding of electrical characterization, signal integrity, and power integrity
  • Experience managing small teams or leading technical projects as an individual contributor with leadership responsibilities
  • Experience with ATE or system‑level testing is a plus
  • Excellent communication, organizational, and cross‑functional collaboration skills
Seniority level
  • Mid‑Senior level
Employment type
  • Full‑time
Industry
  • Semiconductor Manufacturing
Benefits
  • Medical insurance
  • Vision insurance
  • 401(k)
Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

Senior Validation Engineering Manager – Memory Interface Chips
Senior Validation Engineering Manager – Memory Interface Chips

OSI Engineering • Atlanta (GA)

On-site
USD 170,000 - 210,000
Validation Engineer - Senior
Validation Engineer - Senior

TekWissen ® • San Jose (CA)

On-site
Sr Engineer I - Validation (Systems)
Sr Engineer I - Validation (Systems)

Microchip Technology Inc. • Roseville (CA)

On-site
USD 70,000 - 205,000
Health benefits day one
ESPP program with 2-year look back
Retirement savings plan
DDR Memory Interface System Validation Lead Engineer
DDR Memory Interface System Validation Lead Engineer

191 Altera Corporation • San Jose (CA)

On-site
USD 149,000 - 215,000
Memory Validation Architect
Memory Validation Architect

Altera • San Jose (CA)

On-site
USD 210,000 - 303,000
Staff Post Silicon Electrical Validation Engineer
Staff Post Silicon Electrical Validation Engineer

Renesas Electronics Corporation • Duluth (GA)

On-site
USD 120,000 - 160,000
Competitive benefits package
Memory Validation Architect
Memory Validation Architect

191 Altera Corporation • San Jose (CA)

On-site
USD 210,000 - 303,000
Sr Engineer I - Validation (Systems)
Sr Engineer I - Validation (Systems)

FHLB Des Moines • Roseville (CA)

On-site
USD 70,000 - 205,000
Health benefits from day one
Retirement savings plan
Employee stock purchase plan (ESPP)
Senior Technical Staff Engineer - Validation (System Design)
Senior Technical Staff Engineer - Validation (System Design)

Microchip Technology Inc • San Jose (CA)

On-site
USD 91,000 - 232,000
Health benefits from day one
Quarterly bonus payments
Retirement savings plans
+1
Memory Silicon Validation Engineer
Memory Silicon Validation Engineer

Broadcom • Mendota Heights (MN)

On-site
USD 110,000 - 176,000
Discretionary annual bonus
Equity grant and annual equity awards
401(k) with company match
+3