Sr. Manager Silicon Design Engineering

AMD; Santa Clara (CA); Remote; USD 180,000 - 240,000; Full time

Benefits offered by this job

AMD benefits at a glance

Job summary

AMD, Inc. is seeking a Senior Manager Silicon Design Engineering to develop timing closure methodologies for SoC/IP blocks and to lead STA closure across complex designs. You will drive clocking strategies, work with IP, CAD, and Methodology teams, and ensure on-time delivery with optimal performance and power.

This role may be remote. Travel is NO. A Master’s degree in a relevant field or a Bachelor’s with six years of related experience is required.

Qualifications

• Master’s degree or foreign equivalent in Electronics Engineering, Computer Science, Computer Engineering, or Electrical Engineering.
• Four (4) years of experience in the job offered or a closely related engineering role.
• Alternate: Bachelor’s degree or foreign equivalent with six (6) years of related experience.

Responsibilities

• Develop timing closure methodologies and strategies for SoC and IP blocks.
• Oversee STA closure for complex designs and guide cross-functional teams.
• Collaborate with IP, CAD, and Methodology teams to meet product specifications.

Skills

CAD tools

ASIC design

EDA tools

Scripting (TCL/Python)

STA closure

Clock tree

Floorplanning/CTS

Leadership

Education

Master’s degree or foreign equivalent in Electronics Engineering, Computer Science, Computer Engineering, or Electrical Engineering

Bachelor’s degree with six years of related experience

Tools

EDA tools

Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And we’re looking for talent who feel the same: people who want to leave the planet better than they found it, those who don’t shy away from humanity’s challenges but are determined to help solve them.

AMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI. Whether you’re designing next-gen processors, enabling AI breakthroughs, or creating go-to-market plans, every role at AMD contributes to something bigger — technology that moves the world forward.

Job Role and Responsibility:

AMD, Inc., is hiring Sr. Manager Silicon Design Engineering to Develop and establish timing closure methodologies and strategies for SoC and IP blocks to ensure compliance with requirements and provide technical guidance to execution teams. Oversee STA closure for complex SoC designs featuring chiplet and 3D stack interfaces. Leverage extensive knowledge and experience in physical design and full-chip timing to tackle large, cutting-edge designs, ensuring high-quality, on time delivery. Understand the SoC as an integrated system while optimizing for performance and power. Collaborate cross-functionally with IP, Domain, CAD, and Methodology teams to identify and address intricate technical challenges and risks, and create solutions to meet product specifications. Share knowledge and contribute to various SoC functions. As the overall STA and clocking lead, take responsibility for architectural analysis and the scoping/assessment of feature changes. Partner closely with design teams to refine clocking, area and floorplan, set timing targets, and secure performance sign-offs. Assist Post-Silicon teams with debugging and resolving timing issues. Utilize knowledge of computers and electronics, including circuit boards, processors, chips, and electronic equipment, as well as knowledge of design techniques, tools, and principles. Apply knowledge of engineering principles, best practices, and technologies to the design, development, and testing of various company proprietary products.

Can work remotely.

Supervises.

Travel required:

NO

Qualifications: Degree required

Master’s degree or foreign equivalent in Electronics Engineering, Computer Science, Computer Engineering, or Electrical Engineering or related field.

Qualifications: Amount and type of experience required:

Four (4) years of experience in the job offered or a closely related engineering role.

Alternate combination of education and experience:

Employer will alternatively accept a Bachelor’s degree or foreign equivalent in Electronics Engineering, Computer Science, Computer Engineering, or Electrical Engineering or related field and six (6) years of experience in the job offered or a closely related engineering role.

Specific skills required: The following skills are required:

Position requires four (4) years of experience in the following:

• Using Computer-Aided Design (CAD) tools to oversee the entire chip design process;
• Overseeing the physical design of deep submicron digital ASICs;
• ASIC design tools, including synthesis, simulation, equivalence checking, and static timing analysis;
• Using back-end Electronic Design Automation (EDA) tools to oversee the physical implementation of a chip design;
• Scripting in TCL, Perl or Python to automate repetitive steps in the design process, such as logic synthesis, timing analysis, or place-and-route;
• Overseeing Static Timing Analysis (STA) closure to ensure a chip design will function correctly at its target speed;
• Owning global clock tree construction and analysis for best PPA;

• Using Physical Design Closure, including floor planning, placement, clock tree synthesis (CTS), routing, and timing closure;

• Managing silicon design projects; and
• Leading an engineering team.

Can work remotely

Supervises

Preferred Skills: N/A

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.