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Everest Consultants, Inc. seeks a Senior FPGA Engineer to design, implement, and optimize FPGA-based solutions for AI workloads, focusing on RTL and HLS design and system-level verification on high-performance FPGA platforms.
You will collaborate with architecture, software and validation teams to meet performance, power and reliability targets, contribute to design reviews, and help define best practices for FPGA development within the organization.
Duration: FTE / Contract (3 - 6 months) / Part-Time
Our client is building groundbreaking heterogeneous architectures designed for the disaggregated computing needs of modern AI workloads. The company focuses on systems that can support 100x performance-to-bandwidth demands expected from future large-scale AI factories. By rethinking how compute, memory, and interconnects work together, our client enables highly efficient and scalable AI infrastructure.
Description
The Senior FPGA Engineer will design, implement, and optimize FPGA-based solutions that support client's advanced AI computing architectures. This position involves RTL and HLS design, and system-level verification on high-performance FPGA platforms.
Day-to-day responsibilities include developing and refining FPGA modules, debugging complex hardware issues, collaborating with cross-functional teams (architecture, software, and validation), and ensuring designs meet performance, power, and reliability targets. The engineer will also contribute to design reviews, maintain documentation, and help define best practices and methodologies for FPGA development within the organization.
Minimum Qualifications
Preferred Qualifications