Digital Design Engineer

BrainChip; Laguna Hills (CA); Hybrid; USD 100,000 - 170,000; Full time

Benefits offered by this job

Medical insurance

Vision insurance

401(k)

Disability insurance

Job summary

A technology company in Laguna Hills, CA, is seeking an experienced Digital Design Engineer to design and verify high-performance digital systems. The role requires expertise in FPGA development and Verilog, alongside a strong ability to collaborate with cross-functional teams. An ideal candidate will have 5+ years of experience in digital design and familiarity with tools such as ModelSim and Vivado. This is a hybrid role, requiring presence in the office 3 times a week, offering benefits like medical and vision insurance.

Qualifications

• 5+ years of experience in digital design engineering, focusing on FPGA development.
• Proficiency in Verilog and optionally VHDL for RTL design.
• Hands-on experience with simulation and debugging tools.

Responsibilities

• Design and implement digital logic systems using FPGA platforms and Verilog.
• Develop and optimize RTL code, ensuring efficient synthesis.
• Perform simulation, verification, and debugging of digital designs.

Skills

FPGA development

Verilog

Problem-solving

Cross-functional collaboration

Timing analysis

Simulation and debugging

Education

Bachelor’s or Master’s degree in Electrical Engineering or related field

Tools

ModelSim

Vivado

Quartus

Job description

Base pay range

$100,000.00/yr - $170,000.00/yr

Additional compensation types

Annual Bonus and RSUs

We are seeking an experienced Digital Design Engineer with a proven track record in FPGA development and hardware description languages, particularly Verilog. The ideal candidate will be responsible for designing, implementing, and verifying high-performance digital systems for complex applications. This role requires deep expertise in FPGA architecture, synthesis, timing analysis, and optimization, as well as proficiency in simulation and debugging tools. Strong problem‑solving skills, attention to detail, and the ability to collaborate with cross‑functional teams are essential. Experience with VHDL, embedded systems, and high‑speed interfaces is a plus.

*This is a hybrid role, in our office in Laguna Hills, CA 3x a week.

About the Role

Your responsibilities will include troubleshooting hardware and design issues, developing testbenches, validating functionality, and guiding customers or internal teams through FPGA integration and optimization processes. A solid understanding of FPGA toolchains, simulation, and synthesis flows is essential for success in this role.

Responsibilities

• Design and implement digital logic systems using FPGA platforms and Verilog for high‑performance applications.
• Develop and optimize RTL code, ensuring efficient synthesis, timing closure, and resource utilization.
• Perform simulation, verification, and debugging of digital designs using industry‑standard tools and methodologies.
• Collaborate with hardware, software, and systems engineering teams to integrate FPGA solutions into larger systems.
• Conduct timing analysis and troubleshoot design issues, ensuring compliance with performance and reliability requirements.
• Document design specifications, test plans, and results, maintaining clear and accurate technical records throughout the development cycle.

Qualifications

To perform this job successfully, an individual must be able to perform each essential duty satisfactorily. The requirements listed below are representative of the knowledge, skill, and ability required. Reasonable accommodations may be made to enable individuals with disabilities to perform the essential functions.

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
• 5+ years of experience in digital design engineering with a focus on FPGA development.
• Proficiency in Verilog (and optionally VHDL) for RTL design and verification.
• Strong understanding of FPGA architecture, synthesis, timing analysis, and resource optimization.
• Hands‑on experience with simulation and debugging tools (e.g., ModelSim, Vivado, Quartus).
• Familiarity with high‑speed interfaces (PCIe, DDR, Ethernet) and embedded systems integration.
• Excellent problem‑solving skills and ability to work in cross‑functional teams.
• Knowledge of CPU and SRAM based SoC components and system busses (AXI, AHB, APB) is strongly desired.
• Knowledge of standard SoC interfaces (SPI, I2C, etc.…) and high‑speed IO protocols (PCIe, USB, DDR) is a plus.
• Good skills in Python and shell scripting are desired.
• Good debugging skills, and well experienced with VCS/Verdi or similar toolsets.

At BrainChip, we hire based on potential, performance, and alignment with our mission to shape the future of intelligent edge computing. We are committed to providing a fair and respectful workplace where individuals are evaluated on their qualifications and contributions. Employment decisions are made without regard to race, color, religion, sex, national origin, age, disability, or any other status protected by applicable law.

We value the diverse perspectives and experiences that help drive innovation in neuromorphic AI and welcome applicants from all backgrounds who share our passion for advancing technology that matters.

Seniority level

• Mid‑Senior level

Employment type

• Full‑time

Job function

• Computer Hardware Manufacturing

Benefits

• Medical insurance
• Vision insurance
• 401(k)
• Disability insurance