Sr Firmware Engineer

Mirafra Technologies; Sunnyvale (CA); Sur place; USD 160 000 - 260 000; Plein temps

Résumé du poste

Mirafra Technologies in Sunnyvale, CA, seeks an embedded firmware engineer for AI accelerator silicon. You will own firmware architecture, boot/init, device drivers, memory controllers, and the on-device runtime from first silicon to production.

You will lead silicon bring-up, debug RTL-vs-firmware issues, and collaborate with RTL/architecture teams to shape register maps and HW/SW contracts. Strong troubleshooting across the stack is essential.

Qualifications

• Embedded firmware experience
• Hardware-software integration
• RTL-firmware debugging
• HAL and register-access knowledge
• On-device runtime experience
• Collaboration with RTL/architecture teams
• Debug techniques across stack (JTAG, logic analyzers)

Responsabilités

• Firmware for AI accelerator silicon, covering datapath engines, DMA, and memory controllers.
• Own firmware architecture: boot/init, device drivers, command/queue dispatch, interrupts, DMA.
• Lead silicon bring-up: first-power tests, RTL–firmware debug, register-level verification.
• Build and maintain HAL and register-access layers against evolving RTL.
• Implement on-device runtime: workload scheduling, memory management, host synchronization.
• Co-develop with RTL/architecture teams to influence register maps, interrupt models, HW/SW contracts.
• Debug across stack with logic analyzers, JTAG, on-chip trace; correlate firmware to RTL simulations.

Description du poste

• Embedded firmware for custom AI accelerator silicon — the layer between the host software stack and the hardware (datapath engines, DMA, memory controllers, attention/tensor units). Owns bring-up, device control, and the on-device runtime from first silicon to production.
• Own firmware architecture: boot/init, device drivers, command/queue dispatch, interrupt handling, DMA orchestration, power/clock management.
• Lead silicon bring-up: first-power, debug of RTL-vs-firmware mismatches, register-level verification against the hardware spec.
• Build and maintain the hardware abstraction layer (HAL) and register-access layer against evolving RTL.
• Implement the on-device runtime: workload scheduling onto compute engines, memory management, synchronization with host.
• Co-develop with RTL/architecture teams — influence register maps, interrupt models, and HW/SW interface contracts before freeze.
• Debug across the stack: logic analyzer / JTAG / on-chip trace, correlate firmware behavior to RTL waveforms and simulation