Sr Engineer, Adv DRAM PI

Micron Technology, Inc; Boise (ID); On-site; USD 90,000 - 130,000; Full time

Benefits offered by this job

Medical, dental, and vision plans

Paid family leave

Paid time-off program

Job summary

Micron Technology, Inc is looking for a Senior Engineer in Boise, Idaho to lead technology integration for next‑generation layered memory solutions. The ideal candidate will have over 10 years of experience in semiconductor process integration and a strong background in device physics.

The role involves optimizing performance processes, collaborating with multi-functional teams, and communicating technical findings. Micron offers comprehensive benefits, including medical, dental, vision plans, and paid time-off.

Qualifications

• 10+ years of relevant industry experience in semiconductor process integration or advanced node development.
• Strong functional knowledge of semiconductor device physics.
• Proven experience driving multi‑functional technical teams.

Responsibilities

• Lead technology integration activities for layered memory devices.
• Optimize process flows to meet product performance requirements.
• Analyze defect data to evaluate failure mechanisms.

Skills

Semiconductor process integration

Device physics

Experiment design

Project management

Education

MS or PhD in Physics, Materials Science, Electrical Engineering

Job description

Req ID: JR99962 - Sr Engineer, Adv DRAM PI

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence. Our vision is to transform how the world uses information to enrich life for all.

As part of Micron’s Technology Development organization, you will join a world‑class team in our industry‑leading R&D facility, focusing on novel solutions for scaling, performance, and power in next‑generation layered memory technology. This role bridges the gap between device physics and materials science to define the future of memory technology.

Responsibilities

• Lead technology integration activities to enable brand new layered memory devices, focusing on components like charge storage devices and thin‑film transistors (TFTs).
• Develop and integrate new device architectures, moving concepts from paper through to silicon productisation.
• Optimize process flows and implement creative solutions to meet complex product performance and reliability requirements.
• Build and complete experiments in the R&D fab by collaborating with multi‑functional teams, including build, yield improvement, and probe.
• Analyze inline, defect, and parametric data to evaluate failure mechanisms and drive continuous yield improvement.
• Communicate complex technical findings and actionable solutions to both technical and non‑technical audiences.

Minimum Qualifications

• MS or PhD in Physics, Materials Science, Electrical Engineering, or a related technical field.
• 10+ years of relevant industry experience in semiconductor process integration or advanced node development.
• Strong functional knowledge of semiconductor device physics and meticulous experiment design (DOE).
• Proven experience driving multi‑functional technical teams and managing complex projects.

Preferred Qualifications

• Detailed knowledge of mainstream memory technologies (DRAM, NAND) and alternative memory challenges.
• Familiarity with circuit and architecture issues as they relate to advanced memory scaling.
• Experience in technology pathfinding or R&D environments focusing on non‑conventional architectures.

Job Profile(s): Semiconductor Process Engineer 3

Relocation Level: TBD

Micron benefits include a choice of medical, dental and vision plans, income protection, paid family leave, and a robust paid time‑off program with paid holidays. For additional information, see our Benefits Guide.

Micron is proud to be an equal‑opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.