Sr. Digital Design Engineer

Jobot; Tacoma (WA); On-site; USD 150,000 - 180,000; Full time

Job summary

Join a forward-thinking company as a Senior Digital Design Engineer, where you will play a pivotal role in developing cutting-edge satellite technology. This innovative firm is building a global Bluetooth network, and you'll be at the forefront of designing systems that enhance machine-to-machine connectivity. With a focus on high-speed, low-latency solutions, you'll collaborate with talented engineers to push the boundaries of satellite communication. Enjoy comprehensive benefits, unlimited PTO, and the opportunity to work on state-of-the-art technology in a dynamic environment that values your growth and well-being.

Benefits

Comprehensive Benefits – Health, Dental, Vision

Unlimited PTO

Parental Leave

Learning & Development Allowance

Health & Wellness Stipend

Sabbatical Program

Team retreats

Cutting-Edge Space Tech

Qualifications

• 5+ years in FPGA-based digital design with real-time signal processing.
• Expertise in RTL design for high-throughput, low-latency receivers.

Responsibilities

• Develop system architecture and RTL codebase for FPGA module.
• Collaborate with cross-functional teams to optimize satellite systems.

Skills

FPGA-based digital design

RTL design (Verilog/SystemVerilog)

High-speed memory interfaces

Communication systems

Excellent Communication Skills

Education

Bachelor’s in Electrical Engineering

Master’s in Computer Engineering

Tools

ModelSim

Vivado

Python

Tcl

Job description

1 week ago Be among the first 25 applicants

This range is provided by Jobot. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more.

Base pay range

$180,000.00/yr - $180,000.00/yr

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Job details

This Jobot Job is hosted by Christina Finster

Are you a fit? Easy Apply now by clicking the "Easy Apply" button and sending us your resume.

Salary: $180,000 - $180,000 per year

A Bit About Us

Our Series B client is building a Global Bluetooth network dedicated to machine-to-machine connectivity. They differentiate themselves as the first modem-less and gateway-less, direct-to-satellite network from off-the-shelf BLE chips.

Why join us?

Compensation & Benefits

• Salary $150K – $180K/year (commensurate with experience)
• Comprehensive Benefits – Health, Dental, Vision, & HSA options
• Unlimited PTO – Take the time you need to recharge
• Parental Leave – Paid time off to welcome a new child
• Learning & Development Allowance – Invest in your growth
• Health & Wellness Stipend – Support for your physical and mental well-being
• Sabbatical Program – Recharge and explore new ideas after five years
• Cutting-Edge Space Tech – Work on state-of-the-art satellite systems
• Additional Perks – Team retreats, swag, and more

Job Details

As a Senior Digital Design Engineer, you will develop the system architecture and RTL codebase for the FPGA module that performs localization and packet decoding from ground-based BLE transmissions. You’ll collaborate with a cross-functional team to optimize throughput, accuracy, power efficiency, and reliability of the satellite constellation.

This is a full-time position based in Seattle, WA.

Ideal Candidate Attributes

• Sense of Urgency: Lead projects from concept to reality effectively
• First Principles Engineering: Understand the fundamentals behind system design
• High Learning Agility: Be eager to learn and improve
• System-Level Design and Analysis: Understand requirements flow and iterate quickly
• Excellent Communication Skills: Convey ideas effectively and participate in reviews
• Anticipation of Needs: Recognize problems and produce reliable solutions

Basic Qualifications

• Bachelor’s or Master’s in Electrical Engineering, Computer Engineering, or related field
• 5+ years in FPGA-based digital design, especially real-time signal processing and communication systems
• Expertise in RTL design (Verilog/SystemVerilog) for high-throughput, low-latency receivers
• Experience with high-speed memory interfaces (DDR/DDR3/DDR4), controller integration, timing, and performance tuning
• Proficiency with serial interfaces (LVDS, SPI, I2C, UART, SERDES links)
• FPGA synthesis, timing closure, resource optimization (Xilinx, Intel/Altera)
• Simulation and verification tools (ModelSim, Questa, Vivado, VUnit) and scripting (Python, Tcl)
• Knowledge of DSP principles and wireless protocol decoders (BLE, ZigBee, LoRa)
• Ability to collaborate with RF, firmware, and systems engineers
• Independent work capability and strong communication skills

Desired Skills

• Distributed DSP systems across multiple FPGAs or compute nodes
• ARM processor integration and peripheral interfacing
• Embedded Linux (Petalinux)
• Synchronization techniques (preamble detection, timing recovery)
• Experience with lab tools (oscilloscopes, logic analyzers, RF test equipment)
• Low-power design for space/resource-constrained systems
• Knowledge of BLE PHY or similar RF standards

Interested in hearing more? Easy Apply now by clicking the "Easy Apply" button.

Jobot is an Equal Opportunity Employer. We promote diversity and consider all qualified candidates without discrimination. Background checks may be performed with your authorization.

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