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Senior ASIC Ethernet Design Engineer

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Chesterbrook (Chester County)

Remote

USD 120,000 - 180,000

Full time

9 days ago

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Job summary

An innovative firm is seeking a talented Sr. ASIC Design Engineer to join their dynamic team. This role involves developing high-performance SoCs for AI and HPC applications, collaborating with cross-functional teams, and driving ASIC development from concept to validation. With a commitment to innovation and collaboration, this organization offers a competitive compensation package and a supportive environment for professionals in the semiconductor industry. If you are passionate about pushing the boundaries of technology and eager to contribute to groundbreaking projects, this opportunity is perfect for you.

Benefits

Medical Coverage
Dental Coverage
Vision Coverage
401(k) with Company Match
Flexible Spending Accounts
Paid Holidays
Generous Paid Time Off
Life Insurance
Pet Insurance

Qualifications

  • 15+ years of ASIC design experience, including networking hardware.
  • Proven success in ASIC and system development.
  • Experience with multiple clock designs and asynchronous interfaces.

Responsibilities

  • End-to-end SoC/ASIC development and validation.
  • Collaborate across teams for system solutions.
  • Define and deliver ASIC system solutions.

Skills

ASIC Design
Networking Hardware Design
TCP/IP
Ethernet MAC/PCS Protocols
Scripting (TCL, Python, Perl)

Education

M.S. in Computer Engineering
M.S. in Computer Science
M.S. in Electrical Engineering

Tools

SystemVerilog
Verilog
VHDL

Job description

Job Description

Salary: [Specify salary or include as per company policy]

Cornelis Networks delivers the world's highest performance scale-out networking solutions for AI and HPC datacenters. Our differentiated architecture seamlessly integrates hardware, software, and system-level technologies to maximize the efficiency of GPU, CPU, and accelerator-based compute clusters at any scale. Our solutions drive breakthroughs in AI & HPC workloads, empowering our customers to push the boundaries of innovation. Backed by top-tier venture capital and strategic investors, we are committed to innovation, performance, and scalability—solving the world's most demanding computational challenges with our next-generation networking solutions.

We are a fast-growing, forward-thinking team of architects, engineers, and business professionals with a proven track record of building successful products and companies. As a global organization, our team spans multiple U.S. states and six countries, and we continue to expand with exceptional talent in onsite, hybrid, and fully remote roles.

Cornelis Networks is hiring talented Sr. ASIC Design Engineers with deep experience in building world-class SoCs for high-performance computing, data analytics, and AI interconnect solutions. Ideal candidates will have 15+ years of ASIC design experience, including 10+ years in networking hardware design, with proven expertise in 50G, 100G, 400G Ethernet MAC/PCS protocols, TCP/IP, RDMA/RoCE, and IPSec, and their applications in high-speed data processing and networking.

Key Responsibilities:

  1. End-to-end SoC/ASIC development.
  2. Front-end standard cell ASIC development, including RTL development, design verification, synthesis, and post-silicon validation.
  3. Collaborate with internal and external cross-functional teams across all levels of the organization.
  4. Define, implement, debug, and deliver system solutions around purpose-built ASICs.

Qualifications:

  • M.S. degree in Computer Engineering, Computer Science, or Electrical Engineering.
  • Proven success in ASIC and system development.
  • Experience with multiple clock designs and asynchronous interfaces.

Minimum Qualifications:

  • 15+ years of post-college experience in silicon development.
  • 15+ years in digital design using HDL (SystemVerilog, Verilog, VHDL).
  • 10+ years in networking hardware design, with expertise in Ethernet MAC/PCS protocols, TCP/IP, RDMA/RoCE, IPSec.
  • 5+ years scripting experience (TCL, Python, Perl).
  • Understanding of Standard Cell ASIC development flow, including digital design, IP integration, simulation, and synthesis.

Location: This role fully supports remote work within the United States, with occasional travel to Chesterbrook Corporate Center in Wayne, PA for in-person collaboration.

We offer a competitive compensation package including equity, cash, incentives, health and retirement benefits. Our environment fosters collaboration with leading semiconductor industry professionals.

Additional benefits include medical, dental, vision coverage, life insurance, flexible spending accounts, pet insurance, paid holidays, 401(k) with company match, and generous paid time off including sick leave, bonding leave, and more.

Cornelis Networks does not accept unsolicited resumes from recruiters or agencies. We are an equal opportunity employer, committed to diversity and inclusion, and provide accommodations for applicants as required by law.

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