Sr. Analog IC Design Engineer – IVR Architecture Team

Anysilicon; New York (NY); Hybrid; USD 110,000 - 180,000; Full time

Job summary

Ferric, Inc. in New York City is seeking an Analog IC Design Engineer to join its IVR Architecture Team, focusing on advanced integrated voltage regulators for AI processors and wearables.

You will drive architecture, define sub-block specs, build system models, run simulations, and design analog IPs in CMOS, collaborating with design, applications, and test teams to meet performance goals.

Experience with high-frequency regulators and EDA tools such as Cadence is preferred.

Qualifications

• MSEE with analog design experience.
• Strong knowledge of control theory and stability analysis.
• Experience with CMOS analog IC design and mixed-signal circuits.

Responsibilities

• Drive system architecture design to optimise product performance targets for Ferric IVRs.
• Identify specifications for sub-blocks within the overall system based on system-level requirements.
• Maintain and implement system-level models to pioneer novel power conversion and control solutions.
• Perform system-level simulations and verification with bench correlation.
• Design, simulate, and layout analog IPs as needed.
• Champion system-level performance goals across design, applications, and testing teams to ensure optimal results.

Skills

Analog design

CMOS

Control theory

Power converter

Verilog

Python

EDA tools

Education

MSEE

Tools

Cadence Virtuoso

SPICE

LVS/DRC

Job description

Ferric, Inc. is a New York City-based technology startup revolutionizing power delivery for Integrated Circuits and Electronic Assemblies through innovative thin-film magnetic inductors integrated with CMOS technology. The company is seeking an Analog IC Design Engineer to join its IVR Architecture Team, focusing on advanced integrated voltage regulators for applications ranging from AI processors to wearable devices.

Responsibilities:

• Drive system architecture design to optimise product performance targets such as efficiency, density, load current transient response, input supply rejection, and reference tracking performance for Ferric IVRs.
• Identify specifications for sub-blocks within the overall system based on system-level requirements.
• Maintain and implement various types of system-level models to pioneer novel power conversion and control solutions.
• Perform system-level simulations and verification with a focus on performance prediction through bench correlation.
• Design, simulate, and layout analog IPs pertinent to IVRs as needed.
• Champion system-level performance goals across design, applications, and testing teams to ensure optimal results.

Qualifications:

• MSEE with analog design experience.
• Strong knowledge of control theory and stability analysis.
• Strong knowledge of switching power converter design.
• Deep knowledge of CMOS analog circuit design; knowledge of digital circuit design.
• Experience with custom IC design flows and tools.

Skills:

• Experience designing high switching frequency integrated voltage regulators.
• Experience designing ICs in standard CMOS; exotic semiconductors are a plus.
• Deep understanding of process and device physics concepts.
• Familiarity with mixed signal verification methodologies.
• Experience with Monte Carlo analysis.
• Familiarity with analog design EDA tools such as Cadence Virtuoso, schematic capture, LVS, DRC, SPICE simulation, parasitic extraction, electromagnetics simulators.
• Experience with bench-level validation, characterization, and debug of full ICs and IC sub-systems.
• Proficiency in languages such as Verilog, Verilog-AMS, Python, Perl, Tcl, Cadence Skill, MATLAB, etc.

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