Space Mixed-Signal Engineer: High-Speed ADC/DAC & FPGA

Azora; Phoenix (AZ); On-site; USD 120,000 - 180,000; Full time

Benefits offered by this job

Generous equity

Competitive healthcare

401(k)

Unlimited PTO

Job summary

Azora seeks an experienced mixed-signal hardware engineer to design between photonic front ends and digital processing. You will develop high-speed ADC/DAC chains, amplifiers and driver circuits, precision bias loops, and FPGA interfaces for space-grade terminals and ground receivers.

Responsibilities span schematic/PCB layouts, SI/PI analysis, noise performance, RF/SerDes links, and lab bring-up. Space-rad-tolerant design, EMC testing, and RTL collaboration are part of the role.

Qualifications

• BS or MS in Electrical Engineering.
• 4+ years of mixed-signal hardware design experience.
• High-speed PCB design experience using modern EDA tools.
• Strong analog fundamentals: noise, op-amps, PLLs, and power supplies.
• Lab experience with oscilloscopes and analyzers; RF/serial link knowledge.

Responsibilities

• Design schematic and PCB layouts for mixed-signal boards including high-speed data converters and laser/drivers.
• Perform signal and power integrity analysis for multi-GHz analog paths and SerDes links.
• Develop precision analog control loops and biasing schemes for space environments.
• Bring up, debug, and characterize boards; verify noise, linearity, and bandwidth.
• Define and implement FPGA interfaces; assist RTL for data capture and calibration.
• Design for space reliability: derating, rad-tolerant components, and redundancy.
• Support EMC/EMI testing and environmental qualification campaigns.

Skills

High-speed mixed-signal design

Noise analysis

PLLs/clocking

Power supply design

Data-converter interfacing

Education

BS in Electrical Engineering

MS in Electrical Engineering

Tools

Altium

Cadence Allegro

Xilinx Vivado

Job description

Azora seeks an experienced mixed-signal hardware engineer to design between photonic front ends and digital processing. You will develop high-speed ADC/DAC chains, amplifiers and driver circuits, precision bias loops, and FPGA interfaces for space-grade terminals and ground receivers.

Responsibilities span schematic/PCB layouts, SI/PI analysis, noise performance, RF/SerDes links, and lab bring-up. Space-rad-tolerant design, EMC testing, and RTL collaboration are part of the role.