K2 Space Corporation is seeking an ASIC Synthesis and Timing Engineer to implement complex SoCs for next-generation satellite systems. You will work on timing constraints from RTL handoff to synthesis and play a pivotal role in timing closure and design integration. The ideal candidate has a background in ASIC design, strong skills in synthesis and constraints development, and excellent communication abilities. The role offers a competitive salary range of $130,000 to $200,000 along with a comprehensive benefits package.
Qualifications
2+ years of experience in ASIC design.
Experience with advanced FinFET process nodes.
Ability to analyze VCLP issues regarding UPF.
Responsibilities
Work on RTL-to-Synthesis flow for physical synthesis.
Drive timing closure across multiple voltage and process corners.
Support chip bring-up and debug through collaboration.
Skills
ASIC design for high-performance blocks
RTL-to-GDSII flows expertise
Synthesis and constraints development
Communication skills
Leadership in cross-functional collaboration
Education
B.S. or M.S. in Electrical Engineering or related field
Tools
Synopsys
Cadence
Siemens
Job description
K2 Space Corporation is seeking an ASIC Synthesis and Timing Engineer to implement complex SoCs for next-generation satellite systems. You will work on timing constraints from RTL handoff to synthesis and play a pivotal role in timing closure and design integration. The ideal candidate has a background in ASIC design, strong skills in synthesis and constraints development, and excellent communication abilities. The role offers a competitive salary range of $130,000 to $200,000 along with a comprehensive benefits package.