Software Architect, Physical Verification

Cadence Design Systems; San Jose (CA); On-site; USD 179,000 - 332,000; Full time

Benefits offered by this job

401(k) plan with employer match

Employee stock purchase plan

Medical, dental and vision plans

Job summary

Cadence Design Systems in California seeks a Software Architect to advance physical verification software for next‑generation semiconductor devices. You will design and implement robust software, validate and document solutions, and tackle complex mathematical and geometric challenges.

This role involves collaboration across a distributed, global team to ensure reliability and impact. Ideal candidates hold a Master’s degree with 10+ years of experience, expert C and C++ skills, and strong

Qualifications

• Master’s degree in Computer Science or Computer Engineering.
• 10+ years of work experience.
• Strong proficiency in C and C++ programming languages.
• Effective written and verbal communication for collaboration across teams.

Responsibilities

• Design, develop, and implement robust software for physical verification of advanced semiconductor devices.
• Validate, maintain, and document software solutions to ensure reliability and accuracy.
• Solve complex mathematical and geometric challenges related to semiconductor verification.
• Collaborate with global team members to deliver high-quality results in a distributed environment.
• Contribute to technical discussions, code reviews, and process improvements.

Skills

C

C++

Software Architecture

Problem Solving

Communication

Education

Master’s degree in Computer Science or Computer Engineering

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Position Overview

We are seeking a talented Software Architect to join our Research & Development (R&D) group, focused on creating advanced software solutions for physical verification products at leading-edge semiconductor nodes. This role is essential to driving innovation in the development and validation of software used in the design and manufacturing of next-generation chips.

Responsibilities

• Design, develop, and implement robust software for physical verification of advanced semiconductor devices.
• Validate, maintain, and document software solutions to ensure reliability and accuracy.
• Solve complex mathematical and geometric challenges related to semiconductor verification.
• Collaborate with global team members to deliver high-quality results in a distributed environment.
• Contribute to technical discussions, code reviews, and process improvements.

Required Qualifications

• Master’s degree in Computer Science or Computer Engineering & 10+ years work experience
• Strong proficiency in C and C++ programming languages.
• Solid problem-solving skills and the ability to tackle technical challenges.
• Effective written and verbal communication skills for collaboration across teams.

Desired Skills

• Exceptional math background, including the ability to address complex mathematical and geometric problems.
• Expert in Physical Verification domain or Computational Geometry
• Experience in developing software for engineering or scientific applications.
• Ability to quickly learn new technologies and adapt to project requirements.

Work Environment

You will be part of an innovative, geographically distributed team dedicated to advancing the capabilities of physical verification software for semiconductor technology. The work environment encourages collaboration, technical excellence, and continuous learning.

Benefits

• Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

The annual salary range for California is $178,500 to $331,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location.

Equal Employment Opportunity Policy

Cadence is committed to equal employment opportunity throughout all levels of the organization. Read the policy(opens in a new tab)

E-Verify

Cadence participates in the E-Verify program in certain U.S. locations as required by law. Download More Information on E-Verify (64K)

Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For.

Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence. Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

We welcome your interest in the company and want to make sure our job site is accessible to all. If you experience difficulty using this site or to request a reasonable accommodation, please contact [e-mail].