SoC Verification & Methodology Engineer

Nutanix; San Diego (CA); On-site; USD 99,000 - 148,000; Full time

Job summary

Qualcomm Technologies, Inc. is seeking an ASIC Engineer to define, model, design (digital and/or analog), optimize, verify, implement, and document IP for high-performance, low-power products.

You will collaborate with cross-functional teams to meet system requirements, apply ASIC knowledge, and contribute to architectures, circuit specs, and simulations using RTL to GDS Flow and Virtuoso. A Bachelor's degree is required; a Master's is preferred.

Qualifications

• Bachelor's degree in Science, Engineering, or related field.
• Master's degree preferred in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.
• At least 6 months of experience with architecture and design tools.
• At least 6 months of experience with scripting languages.
• At least 6 months of experience with design verification methods.

Responsibilities

• Applies ASIC knowledge to define, model, design, optimize, verify, validate, implement, and document IP development for high-performance products.
• Assists in creating architectures, circuit specifications, logic designs, and system simulations based on requirements.
• Collaborates to develop implementation strategies that meet system requirements and customer needs.
• Supports the evaluation of design flow from high-level design to synthesis, place-and-route, timing and power use, and verification.

Skills

ASIC knowledge

Verbal communication

Cross-functional collaboration

Education

Bachelor's degree in Science, Engineering, or related field

Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science

Tools

RTL to GDS Flow

Virtuoso

Scripting languages (Python/Perl)

Job description

Qualcomm Technologies, Inc. is seeking an ASIC Engineer to define, model, design (digital and/or analog), optimize, verify, implement, and document IP for high-performance, low-power products.

You will collaborate with cross-functional teams to meet system requirements, apply ASIC knowledge, and contribute to architectures, circuit specs, and simulations using RTL to GDS Flow and Virtuoso. A Bachelor's degree is required; a Master's is preferred.